JPS58107685A - Manufacture of schottky barrier diode - Google Patents
Manufacture of schottky barrier diodeInfo
- Publication number
- JPS58107685A JPS58107685A JP20671581A JP20671581A JPS58107685A JP S58107685 A JPS58107685 A JP S58107685A JP 20671581 A JP20671581 A JP 20671581A JP 20671581 A JP20671581 A JP 20671581A JP S58107685 A JPS58107685 A JP S58107685A
- Authority
- JP
- Japan
- Prior art keywords
- barrier
- schottky barrier
- temperature
- barrier height
- heat treatment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004888 barrier function Effects 0.000 title claims abstract description 60
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 229910052751 metal Inorganic materials 0.000 claims abstract description 21
- 239000002184 metal Substances 0.000 claims abstract description 21
- 238000010438 heat treatment Methods 0.000 claims description 13
- 150000004678 hydrides Chemical class 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 7
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 229910052763 palladium Inorganic materials 0.000 claims description 3
- 238000007740 vapor deposition Methods 0.000 claims description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims 4
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 2
- 239000010931 gold Substances 0.000 claims 2
- 230000008020 evaporation Effects 0.000 abstract 1
- 238000001704 evaporation Methods 0.000 abstract 1
- 150000002739 metals Chemical class 0.000 description 6
- 229910002845 Pt–Ni Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 229910001316 Ag alloy Inorganic materials 0.000 description 1
- 229910002708 Au–Cu Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28537—Deposition of Schottky electrodes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、ショットキバリアダイオードのショットキバ
リアの形成方法に関する。さらに詳しくは、本発明は、
ある範囲内で任意に制御できるバリアハイドを持つショ
ットキバリアを有するショットキバリアダイオードの製
造方法に関する〇この種のショットキノく、リアダイオ
ード（以下、８ＢＤと略記する）は、一般に、高温にお
ける逆方向漏れ電流が小さく、ブレークダウン電圧が高
く、また順方向電圧降下が小さいことが望まれる。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming a Schottky barrier in a Schottky barrier diode. More specifically, the present invention includes:
Regarding the manufacturing method of a Schottky barrier diode having a Schottky barrier with a barrier hydride that can be arbitrarily controlled within a certain range, this kind of Schottky rear diode (hereinafter abbreviated as 8BD) generally has reverse leakage at high temperatures. It is desired that the current is small, the breakdown voltage is high, and the forward voltage drop is small.
８ＢＤのバリアメタルとしては、従来から種々の金属が
適用されている。代表的なバリアメタルをバリアハイド
の小さい順に並さると、Ｃｒ（０，５８〜０．６０ ｅ
Ｖ ）、Ｍｏ （〜０．６６ ｅＶ ）、Ａｇ （０，
７０ｅＶ）、Ｐｄｚ８ｉ （０，７２〜０．７５ ｅＶ
）、Ｐｉ Ｓｉ （０，８２〜０．８７ｅＶ）であり、
その他にＰｔ−Ｎｉ合金、Ａｕ 、 Ｚｎ 、 ｋｌ、
Ａｕ −Ｃｕ合金、Ａｕ−Ａｇ合金等がある。しかし
、ここにあげた全ての金属が製品としてのショットキバ
リアダイオードに適用できるわけではなく、基板シリコ
ンとの密着強度、半田付するために蒸着される上部多層
金属膜（例えばＮｉ−Ａｕ等）との密着性、半田付性、
安定性等によって使用可能な金属は°限定される。一般
的には、−Ｃｒ、Ｍｏ、 Ｐｔ−Ｎｉ等が実用化されて
いる。しかし、Ｃｒ、Ｍｏ及びＰｔ−Ｎｉのバリアハイ
ドは、それぞれ〜０．６０ｅＶ、 〜０．６６ ｅＶ及
び０．７０ ｅＶであって、その種類によって固定字れ
た値であり、それぞれの金属が持つバリアハイドの中間
の値を得ることは不可能であった。Various metals have been used as barrier metals for 8BD. When typical barrier metals are arranged in descending order of barrier hide, Cr(0.58~0.60 e
V), Mo (~0.66 eV), Ag (0,
70 eV), Pdz8i (0,72-0.75 eV
), PiSi (0.82-0.87eV),
In addition, Pt-Ni alloy, Au, Zn, kl,
There are Au-Cu alloy, Au-Ag alloy, etc. However, not all of the metals listed here can be applied to Schottky barrier diodes as products, and the adhesion strength with the substrate silicon, the upper multilayer metal film (e.g. Ni-Au, etc.) deposited for soldering, etc. adhesion, solderability,
Usable metals are limited by stability etc. Generally, -Cr, Mo, Pt-Ni, etc. are put into practical use. However, the barrier hydrides of Cr, Mo, and Pt-Ni are ~0.60 eV, ~0.66 eV, and 0.70 eV, respectively, which are fixed values depending on the type, and each metal has It was not possible to obtain intermediate values for barrier hydride.
また、一般的にいって、バリアハイドを高くすると高温
での逆方向漏れ電流は減少するが、順方向電圧降下は増
大してしまう。反対にバリアハイドを低くすると順方向
電圧降下は小さいものが得られるが、高温での漏れ電流
が増大する。従来、使用温度範囲１００〜１２５℃では
Ｃｒが、また１５０℃ではＭｏがバリアメタルとして使
用されていた。しかし、近年さらに高温での動作保障が
要求されるに到って、さらに高いバリアハイドが要求さ
れるようになってきた。Generally speaking, increasing the barrier hydride reduces the reverse leakage current at high temperatures, but increases the forward voltage drop. On the other hand, if the barrier hide is lowered, a small forward voltage drop can be obtained, but the leakage current at high temperatures will increase. Conventionally, Cr has been used as a barrier metal in the operating temperature range of 100 to 125°C, and Mo has been used as a barrier metal in the operating temperature range of 150°C. However, in recent years, there has been a demand for guaranteed operation at even higher temperatures, and even higher barrier hides have been required.
したがって、本発明の目的は、上述のような欠点を除去
して、ある範囲内で任意に制御できるバリアハイドを持
つショットキバリアの形成方法を提供することである。Therefore, an object of the present invention is to provide a method for forming a Schottky barrier having barrier hydride that can be arbitrarily controlled within a certain range by eliminating the above-mentioned drawbacks.
さらに、本発明の目的は、そのように制御されたバリア
ハイドを持つショットキバリアを有する８ＢＤを提供す
ることである。Furthermore, it is an object of the present invention to provide an 8BD with a Schottky barrier with such a controlled barrier hide.
ここに、ＳＢＤのショットキバリアを形成するにあたり
、バリアメタルとしてＰｄを使用して蒸着させた後、真
空又は不活性雰囲気中での熱処理温度を変えることによ
り、ある範囲内で任意に制御できるバリアハイドを持つ
ショットキバリアが得られることが見出された。これに
より、高温漏れ電流と順方向電圧降下とのバランスを考
慮して要求特性に応じた広い範囲にわたるバリアハイド
値を持つショットキバリアを有するＳＢＤの製造が可能
となった。Here, in forming the Schottky barrier of SBD, Pd is used as a barrier metal, and after being vapor-deposited, the barrier hide can be controlled arbitrarily within a certain range by changing the heat treatment temperature in a vacuum or an inert atmosphere. It was found that a Schottky barrier with As a result, it has become possible to manufacture an SBD having a Schottky barrier having a barrier-hide value over a wide range according to required characteristics, taking into consideration the balance between high-temperature leakage current and forward voltage drop.
したがって、本発明によれば、ＳＢＤのショットキバリ
アを形成するにあたり、バリアメタルとしてＰｄを蒸着
させ、次いで半田付性を良好にするためにＮｉ及びＡｕ
を多層蒸着させた後、真空又は不活性雰囲気中で熱処理
することを特徴とする、一定の範囲で任意に制御できる
バリアハイドを持つショットキバリアを有する８ＢＤＯ
製造方法が提供される。Therefore, according to the present invention, when forming a Schottky barrier for an SBD, Pd is vapor-deposited as a barrier metal, and then Ni and Au are deposited to improve solderability.
8BDO having a Schottky barrier with a barrier hide that can be arbitrarily controlled within a certain range, characterized by depositing multiple layers of and then heat-treating in a vacuum or inert atmosphere.
A manufacturing method is provided.
本発明の８ＢＤＯ製造方法にお−ては、バリアメタルと
してＰｄが用−られるｏｄｄをバリアメタルとして蒸着
させ、その後Ｏ熱処理温度を変化させることＫよ）バリ
アハイドが変化し、し喪がってバリアハイドを任意に制
御することが可能であることがわかった０本発明の方法
で製造される８ＢＤｄ、一般Ｋ ＯＪ ５〜０．８０
ｅＶ ｔａｒバリアハイドを有するが、これ紘熱処運温
度を変えることによって制御することができる・ Ｐｄ
紘任意の厚さで蒸簾させることができるが、好ましくは
１ｏｏｏ〜５ｏｏｏｉ ｔ＞ａｓで蒸着せしめられる＠
ＰｄＯ蒸着に次いで半田付用金属層としてＮｉ及びムｗ
＃ｌＩ１次に蒸着されるｏＮｉ及びムＯ厚さは、好重し
く紘。In the 8BDO production method of the present invention, Pd is used as a barrier metal.The barrier metal is vapor-deposited as a barrier metal, and then the O heat treatment temperature is changed. It has been found that barrier hydride can be arbitrarily controlled.8BDd produced by the method of the present invention, general K OJ 5 to 0.80
eV tar has a barrier hydride, but this can be controlled by changing the heat treatment temperature.Pd
Although it can be vapor-deposited to any desired thickness, it is preferably 100 to 500% thick.
After PdO deposition, Ni and Mu w were applied as a metal layer for soldering.
#lI1 The next deposited oNi and MuO thicknesses are very thin.
それヤれ３０００−５０００λ及び３００〜７００λで
ある０これらの金属の蒸着線画業界で周知の方法で実施
することができる０
上記のように多層金属（Ｐｄ−Ｎｉ−ムＵ）を蒸着せし
められ友シリコン基板は、次いで通常の後処理工程、例
えばフォトリソグラフィ一工程でパターニングした後に
ｌＸｌ０ ｔｏｒｒ以下の真空中で又はヘリウム、ア
ルゴン等のような不活性雰囲気中で熱処理に付される。It is 3000-5000λ and 300-700λ. Vapor deposition of these metals can be carried out by methods well known in the line drawing industry. The silicon substrate is then patterned in a conventional post-processing step, such as a single photolithography step, and then subjected to a heat treatment in a vacuum of less than 1X10 torr or in an inert atmosphere such as helium, argon, or the like.
熱処理温度は、要求特性に応じて変えることができる。The heat treatment temperature can be changed depending on the required characteristics.
一般に、温度が低いほどバリアハイドは高く、温度が高
くなるにつれてバリアハイドは低くなる。例えば、熱処
理温度１５０℃〜３５０℃の範囲において、Ｐｄバリア
のバリアハイドは０．７６ ｅＶから０．７０ ｅＶ
ｉで変化する。Generally, the lower the temperature, the higher the barrier hide, and the higher the temperature, the lower the barrier hide. For example, in the heat treatment temperature range of 150°C to 350°C, the barrier hydride of the Pd barrier is 0.76 eV to 0.70 eV.
Changes with i.
熱処理時間も任意に選定できるが、一般に１０分〜１時
間であってよい。このように、適切な熱処理条件を選択
することにより所望の特性を持つＳＢＤを製造すること
ができる。Although the heat treatment time can also be arbitrarily selected, it may generally be 10 minutes to 1 hour. In this way, by selecting appropriate heat treatment conditions, an SBD with desired characteristics can be manufactured.
以上のように、本発明によれば、従来バリアメタルの種
類によって固定されていたバリアハイドを、Ｐｄを選択
することによってかなり広い範囲で制御することができ
、これにより高温漏れ電流と順方向電圧降下のバランス
を見ながら適切なバリアハイドを実現することが可能と
なった。As described above, according to the present invention, the barrier hide, which was conventionally fixed depending on the type of barrier metal, can be controlled over a fairly wide range by selecting Pd. It became possible to achieve an appropriate barrier hide while monitoring the balance of the descent.
本発明の方法で製造された８ＢＤは、多くの用途に使用
できるが、特に、高温での動作保障が要求される用途、
例えば電力用に使用することができる。The 8BD manufactured by the method of the present invention can be used in many applications, especially those that require guaranteed operation at high temperatures.
For example, it can be used for power.
実施例
電極窓あけしたシリコン基板を真空中で１００〜１５０
℃のバックヒートを行ないながら、まずＰｄを約４００
ＯＡの厚さに蒸着する０ しかる後、半田付用金属層と
して連続して約４ｏｏｏｉのＮｉと約５００にのＡｕを
蒸着させる。このように形成した蒸着膜を通常のフォト
リソグラフィ一工程でバターニングした後に、ｌＸｌ０
ｔｏｒｒ以下の真空中で加分間熱処理した０熱処理
源度は１５０℃から３５０℃の範囲で変えた。得られた
生成物のバリアハイドの変化を第１図に示す。適切な熱
処理温度を選択することにより所望のバリアハイド値を
持つＳＢＤを得ることが可能であることがわかる。Example: A silicon substrate with an electrode window is heated to 100 to 150 µm in vacuum.
While backheating at ℃, Pd was first heated to about 400℃.
The thickness of the OA is then evaporated to approximately 400 mm.Ni and about 500 mm of Au are then successively deposited as a soldering metal layer. After patterning the vapor deposited film thus formed in one step of normal photolithography, lXl0
The temperature of the zero heat treatment performed in a vacuum of torr or less was varied in the range of 150°C to 350°C. FIG. 1 shows the change in barrier hydride of the obtained product. It can be seen that by selecting an appropriate heat treatment temperature, it is possible to obtain an SBD with a desired barrier-hide value.
第１図は、本発明の方法で得られたＳＢＤのバリアハイ
ドと熱処理温度との関係を示す線図であるＯFIG. 1 is a diagram showing the relationship between the barrier hide of SBD obtained by the method of the present invention and the heat treatment temperature.
Claims (1)
形成するにあたり、バリアメタルとしてパラジウムを蒸
着させ、次いでニッケル及び金を多層蒸着した後、真空
又は不活性雰囲気中で熱処理することを特徴とする、任
意に制御できるバリアハイドを持つショットキバリアを
有するショットキバリアダイオードの製造方法。 ２、特許請求の範囲第１項記弊の製造方法において、パ
ラジウム、ニッケル及び金がそれぞれ２０００〜５００
０λ、３０００〜５０００ｋ及び３００〜７００λの厚
さで蒸着されることを特徴とする製造方法。 ３）４！許請求の範囲第１項記載の製造方法において、
熱処理温度を１５０℃〜３５０℃の間で変化せしめ、こ
れによりバリアハイドを制御することを特徴とする製造
方法。[Claims] l) In forming the Schottky barrier of the Schottky barrier diode, palladium is deposited as a barrier metal, and then nickel and gold are deposited in multiple layers, followed by heat treatment in a vacuum or an inert atmosphere. A method for manufacturing a Schottky barrier diode having a Schottky barrier with an arbitrarily controllable barrier hydride. 2. Claim 1 In our manufacturing method, palladium, nickel and gold each contain 2,000 to 500
A manufacturing method characterized in that the vapor deposition is performed to a thickness of 0λ, 3000 to 5000k, and 300 to 700λ. 3) 4! In the manufacturing method according to claim 1,
A manufacturing method characterized in that the heat treatment temperature is varied between 150°C and 350°C, thereby controlling barrier hide.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20671581A JPS58107685A (en) | 1981-12-21 | 1981-12-21 | Manufacture of schottky barrier diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20671581A JPS58107685A (en) | 1981-12-21 | 1981-12-21 | Manufacture of schottky barrier diode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58107685A true JPS58107685A (en) | 1983-06-27 |
Family
ID=16527905
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20671581A Pending JPS58107685A (en) | 1981-12-21 | 1981-12-21 | Manufacture of schottky barrier diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58107685A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4622736A (en) * | 1984-01-30 | 1986-11-18 | Tektronix, Inc. | Schottky barrier diodes |
-
1981
- 1981-12-21 JP JP20671581A patent/JPS58107685A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4622736A (en) * | 1984-01-30 | 1986-11-18 | Tektronix, Inc. | Schottky barrier diodes |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4478881A (en) | Tungsten barrier contact | |
| JPH03133176A (en) | Silicon carbide semiconductor device and manufacture thereof | |
| US4035526A (en) | Evaporated solderable multilayer contact for silicon semiconductor | |
| JPS58107685A (en) | Manufacture of schottky barrier diode | |
| US20100301989A1 (en) | Sputter deposition of cermet resistor films with low temperature coefficient of resistance | |
| CN112553624A (en) | Preparation method of black decorative film applied to plastic | |
| US5757032A (en) | Semiconductor diamond device having improved metal-diamond contact for excellent operating stability at elevated temperature | |
| US3591413A (en) | Resistor structure for thin film variable resistor | |
| JPS63224112A (en) | Superconducting wire and its manufacture | |
| JPH03179793A (en) | Surface structure of ceramic board and manufacture thereof | |
| JPH0657399A (en) | Ceramic-coating method for metal base material | |
| JP2563315B2 (en) | Superconductor wire and method of manufacturing the same | |
| CN110230029B (en) | Preparation method of spinel-structured manganese-nickel oxide film | |
| IE903774A1 (en) | PROCESS FOR PRODUCING OHMIC ELECTRODE FOR p-TYPE CUBIC¹SYSTEM BORON NITRIDE | |
| CH688169A5 (en) | Electrical resistance layer. | |
| JPS5858777A (en) | Manufacture of semiconductor element | |
| JPH07122724A (en) | Ohmic electrode of n-type cubic boron nitride semiconductor and its formation | |
| US3315208A (en) | Nitrogen stabilized titanium thin film resistor and method of making same | |
| JPH0654807B2 (en) | Method of forming ohmic contact for hydrogenated amorphous silicon | |
| EP0217095A2 (en) | Method of producing low-ohmic, transparent indium-tin oxide layers, especially for imagers | |
| JPH0365502A (en) | Preparation of superconductive thin film | |
| CN114592172A (en) | Interdigital electrode of surface acoustic wave filter, preparation method thereof and surface acoustic wave filter | |
| JPH0745552A (en) | Electrode forming method on oxide semiconductor | |
| WO2016049727A1 (en) | Precision chip resistor and preparation method thereof | |
| US2903632A (en) | Selenium cells |