JPS58104023U - electronic tuner - Google Patents
electronic tunerInfo
- Publication number
- JPS58104023U JPS58104023U JP146382U JP146382U JPS58104023U JP S58104023 U JPS58104023 U JP S58104023U JP 146382 U JP146382 U JP 146382U JP 146382 U JP146382 U JP 146382U JP S58104023 U JPS58104023 U JP S58104023U
- Authority
- JP
- Japan
- Prior art keywords
- tuner
- shield
- circuit
- electronic tuner
- assembled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structure Of Receivers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図はシールド板にて区画されたメインプリント基板
の斜視図、第２図はそれをシールドベース筐体内に組付
けた状態を示す斜視図、第３図ａ。
ｂは夫々本考案のサブプリント基板を表面及び裏面から
見た状態を示す斜視図、第４図はそれをメインプリント
基板に固設した状態を示す斜視図、第５図はスプリット
キャリヤ方式の電子チューナに本考案を実施した場合の
結線状態を示すメインプリント基板の上面図、ｉ６図は
それと同一のメインプリント基板を用いた場合のインタ
ーキャリヤ方式に対する結線状態を示す上面図である。
１・・・メインプリント基板、２・・・チューナ回路用
の電子部品、３・・・シールド板、５・・・チューテベ
ース筐体、６・・・電子チューナ、７・・・シールド面
、８°°°バッファ回路、１１・・・サブプリント基板
、１４・・・混合段、１５・・・局部発振段、１６・・
・結合用コンデンサ。FIG. 1 is a perspective view of the main printed circuit board divided by shield plates, FIG. 2 is a perspective view showing the main printed circuit board assembled into the shield base housing, and FIG. 3a. b is a perspective view showing the sub-printed circuit board of the present invention as seen from the front and back sides, FIG. 4 is a perspective view showing the sub-printed circuit board fixed to the main printed circuit board, and FIG. A top view of the main printed circuit board showing the wiring state when the present invention is implemented in a tuner, and Figure i6 is a top view showing the wiring state for the intercarrier system when the same main printed board is used. DESCRIPTION OF SYMBOLS 1... Main printed circuit board, 2... Electronic components for tuner circuit, 3... Shield plate, 5... Tute base housing, 6... Electronic tuner, 7... Shield surface, 8°°° buffer circuit, 11... sub-printed board, 14... mixing stage, 15... local oscillation stage, 16...
・Coupling capacitor.
Claims (1)
プリント基板を収納させ、チューナ回路の各部をシール
ド板でシールド区画した電子チューナにおいて、前記シ
ールド板は一方の面にシールド面を、また、他方の面に
前記チューナ回路の局部発振段と混合段間に挿入するバ
ッファ回路を組付けたサブプリント基板・により構成し
たことを特徴とする電子チューナ。In an electronic tuner in which a main printed circuit board with a tuner circuit assembled is housed in a shield base housing, and each part of the tuner circuit is shielded and partitioned by a shield plate, the shield plate has a shield surface on one surface and a shield surface on the other surface. An electronic tuner comprising: a sub-printed board on which a buffer circuit inserted between the local oscillation stage and the mixing stage of the tuner circuit is assembled.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP146382U JPS58104023U (en) | 1982-01-09 | 1982-01-09 | electronic tuner |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP146382U JPS58104023U (en) | 1982-01-09 | 1982-01-09 | electronic tuner |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58104023U true JPS58104023U (en) | 1983-07-15 |
Family
ID=30014477
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP146382U Pending JPS58104023U (en) | 1982-01-09 | 1982-01-09 | electronic tuner |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58104023U (en) |
-
1982
- 1982-01-09 JP JP146382U patent/JPS58104023U/en active Pending
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