JPS58104010U - buffer circuit - Google Patents

buffer circuit

Info

Publication number
JPS58104010U
JPS58104010U JP19396781U JP19396781U JPS58104010U JP S58104010 U JPS58104010 U JP S58104010U JP 19396781 U JP19396781 U JP 19396781U JP 19396781 U JP19396781 U JP 19396781U JP S58104010 U JPS58104010 U JP S58104010U
Authority
JP
Japan
Prior art keywords
transistor
base
buffer
current
buffer transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19396781U
Other languages
Japanese (ja)
Inventor
曽根田 光生
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP19396781U priority Critical patent/JPS58104010U/en
Publication of JPS58104010U publication Critical patent/JPS58104010U/en
Pending legal-status Critical Current

Links

Landscapes

  • Amplifiers (AREA)
  • Picture Signal Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は一般的なエミッタホロワ回路をバッファ回路と
して用いたクランプ回路の回路構成を示す回路図である
。第2図は上記クランプ回路の動作を説明するための波
形図である。第3図は来者゛案をクランプ回路に適用し
た第1の実施例を示す    ′回路図である。第4図
は本考案をサンプルホールド回路に適用した第2の実施
例を示す回路図である。第5図は本考案を電源装置に適
用した第3の実施例を示す回路図である。 1・・・・・・クランプ回路、8・・・・・・クランプ
回路の出。 先端子、20.40・・・バッファ回路、21.41・
・・・・・バッファ用トランジスタ、24.42・・・
・・・電流検出用トランジスタ、25“、  26. 
44. 45゜46・・・・・・カレントミラー回路を
形成するトランジスタ、27,43・・・・・・カレン
トミラー回路。
FIG. 1 is a circuit diagram showing the circuit configuration of a clamp circuit using a general emitter follower circuit as a buffer circuit. FIG. 2 is a waveform diagram for explaining the operation of the clamp circuit. FIG. 3 is a circuit diagram showing a first embodiment in which the author's proposal is applied to a clamp circuit. FIG. 4 is a circuit diagram showing a second embodiment in which the present invention is applied to a sample and hold circuit. FIG. 5 is a circuit diagram showing a third embodiment in which the present invention is applied to a power supply device. 1... Clamp circuit, 8... Clamp circuit output. Tip, 20.40... Buffer circuit, 21.41.
...Buffer transistor, 24.42...
... Current detection transistor, 25", 26.
44. 45°46...Transistor forming a current mirror circuit, 27,43...Current mirror circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号がベースに供給されエミッタから出力信号が取
出されるバッファ用トラ、ンジスタと、電源端子と上記
バッファ用トランジスタのコレクタとの間に直列接続さ
れ該バッファ用トランジスタと同じ導電構造の電流検出
用トランジスタと、上記電流検出用トランジスタのベー
スに入力端子が接続され上記バッファ用トランジスタの
ベースに出力端子が接続されたカレントミラー回路とを
備え、上記バッファ用トランジスタに流れるベース電流
に相当する帰還電流を上記カレントミラー回路を介して
上記バッファ用トランジスタのベース・ に帰還するよ
うにしたことを特徴とするバッファ回路。
A buffer transistor or transistor in which an input signal is supplied to the base and an output signal is taken out from the emitter, and a current detection transistor connected in series between the power supply terminal and the collector of the buffer transistor and having the same conductive structure as the buffer transistor. and a current mirror circuit having an input terminal connected to the base of the current detection transistor and an output terminal connected to the base of the buffer transistor, and configured to generate a feedback current corresponding to the base current flowing through the buffer transistor. A buffer circuit characterized in that the current is fed back to the base of the buffer transistor via the current mirror circuit.
JP19396781U 1981-12-30 1981-12-30 buffer circuit Pending JPS58104010U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19396781U JPS58104010U (en) 1981-12-30 1981-12-30 buffer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19396781U JPS58104010U (en) 1981-12-30 1981-12-30 buffer circuit

Publications (1)

Publication Number Publication Date
JPS58104010U true JPS58104010U (en) 1983-07-15

Family

ID=30107302

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19396781U Pending JPS58104010U (en) 1981-12-30 1981-12-30 buffer circuit

Country Status (1)

Country Link
JP (1) JPS58104010U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6096010A (en) * 1983-10-31 1985-05-29 Nec Corp Transistor circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6096010A (en) * 1983-10-31 1985-05-29 Nec Corp Transistor circuit

Similar Documents

Publication Publication Date Title
JPS58104010U (en) buffer circuit
JPS583613U (en) clamp circuit
JPS59157363U (en) clamp circuit
JPS5963714U (en) constant current circuit
JPS60163832U (en) clamp circuit
JPS58132410U (en) rear equalizer circuit
JPS59121939U (en) linear electronic circuit
JPS58144699U (en) memory circuit
JPS59177213U (en) electrical signal amplification device
JPS618319U (en) Current-voltage converter input protection circuit
JPS5839614U (en) high voltage power supply
JPS59127367U (en) clamp circuit
JPS60150811U (en) buffer circuit
JPS611913U (en) voltage follower circuit
JPS58109319U (en) amplifier
JPS58129709U (en) Muting signal generation circuit
JPS5890749U (en) Waveform shaping circuit
JPS59149711U (en) Muting signal generation circuit
JPS5857109U (en) Charge transfer device drive circuit
JPS5854120U (en) Amplifier circuit protection circuit
JPS5834411U (en) electromotive force converter
JPS616773U (en) voltage comparison circuit
JPS5857978U (en) resistance measurement circuit
JPS59192720U (en) constant current source circuit
JPS58101216U (en) Stabilized power supply circuit