JPS58101531A - Frequency synthesizer - Google Patents

Abstract

PURPOSE:To obtain a small frequency step and to vary a frequency continuously, by providing a local oscillator st the outside of a PLL. CONSTITUTION:A frequency mixer 8 mixing two input signals, and a local oscillator 9 varying an oscillation frequency with a crystal oscillator 10 and a variable reactance element 11 are arranged at the outside of a PLL, and the frequency mixer 8 mixes the output frequency of the PLL and the local oscillator 9. Further, a digital circuit 13 which takes up frequencies under a reference frequency and producing an arbitrary number of digits of digital signal, and a D/A converter 12 are provided and an output from the digital circuit 13 is converted into a DC voltage, which is applied to the variable reactance element 11, to control the oscillating frequency of a local oscillator 9. Moreover, a digital signal at higher-order digit from the digital circuit 13 is applied to a variable frequency divider 6 to control the frequency dividing ratio of the said frequency divider.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a frequency synthesizer used in a radio transmitting/receiving tank (for example, an amateur radio transceiver) that handles frequencies higher than short waves.

This type of synthesizer has a phase-locked loop (hereinafter referred to as P
LL) is used.

As shown in Figure 1, the PLL includes a reference oscillator 1 that stably oscillates a constant reference frequency, a phase detector 2 that detects the phase difference between two input signals, and an output waveform of the phase detector. a low-pass filter 3 that smooths the signal, a voltage-controlled oscillator 4 that controls the frequency with voltage, a frequency/wavenumber mixer 5 that mixes two input signals, and a local oscillator 7 that oscillates the frequency as appropriate.
and a variable frequency divider 6 that divides the frequency of the input signal by 1/N.
However, it is difficult to obtain an output frequency step of 100H2 or less using PLL alone, and the following two methods are used to achieve this.

One of them is to configure the PLL into two stages and slightly shift the reference frequency of each stage to create small frequency steps.

However, in this case, the two PLLs and their auxiliary circuits become very complex, which has the drawback of significantly increasing the product price.

The other method, as shown in FIG. 2, is to equip the local oscillator 7 of the PLL with a frequency variable means consisting of a crystal oscillator 10 and a variable actance element 11, and use a digital circuit 13 to adjust the frequency below the reference frequency. A scaled digital signal with an arbitrary number of digits is obtained, and this is transferred to the digital-to-analog converter 1.
At step 2, the oscillation frequency of the local oscillator is controlled by applying the DC voltage to the variable actance element 11,
However, the high-order digits of the digital signal are sent to the variable frequency divider 6 to control its frequency division ratio and create small frequency steps.

However, in this case, the frequency of the local oscillator 7 in the PLL is usually as high as that of the voltage controlled oscillator 4, so the frequency stability of the local oscillation becomes the stability of the voltage controlled oscillator. Since the frequency of the oscilloscope is changed by a variable actance element, stability with respect to temperature inevitably deteriorates.

Note that some PLLs do not have a local oscillator and a frequency mixer, but since the input upper limit frequency of the variable frequency divider is not so high, they are required when the frequency is higher than shortwave.

The present invention seeks to provide a frequency synthesizer that does not have the above-mentioned drawbacks.

The embodiment shown in FIG. 3 will be described below.

FIG. 3 shows a frequency synthesizer according to the present invention, which includes, in addition to the PLL, a frequency mixer 8 for mixing two input signals, a crystal oscillator 10, and a variable actance element (such as a varicap) 11. The frequency mixer 8 mixes the output frequency of the PLL and the output frequency of the local oscillator 9. and a digital circuit 13 that scales the frequency V below the reference frequency to generate a digital signal having an arbitrary number of digits, and a digital-to-analog converter 12 that converts the digital signal into an analog signal, The output digital signal from the digital circuit 13 is converted into a DC voltage by the digital/analog converter 12 and applied to the variable actance element 11 to control the oscillation frequency of the local oscillator 9. The high-order digital signal from the circuit 13 is sent to the variable frequency divider 6 in the PLL to control the frequency division ratio of the variable frequency divider.

With the above configuration, the digital signal from the digital circuit 13 controls the division ratio of the variable frequency divider 6 inside the PLL and the oscillation frequency of the local oscillator 9 outside the PLL. By frequency-mixing the output frequency of the PLL with the output frequency of the PLL, small frequency steps can be obtained and the frequency can be varied continuously.

By the way, the PLL reference oscillator 1 has the same frequency as the PLL frequency step, so it is generally very low, 5K.
The frequency is about H2~50KHz.

Therefore, the influence of the reference oscillator on the stability of the PLT is very small, and most of the factors that determine the frequency stability of the PLL are the frequency stability of the local oscillator 7 inside the PLL. This is shown in a calculation example as follows.

PLL output frequency (f pt, t,) 15
0MHz reference oscillator output frequency (fRef)
10KHz (frequency step 10KH2) Local oscillator output frequency (fpt,) 140M
Hz, and the reference oscillator and local oscillator have a stability of ±10PP to I(IOX-), which is the same as the stability of a general crystal oscillator, then the stability of the PLL output frequency affected by the reference oscillator is as follows. , there is almost no influence from the reference oscillator.

Further, the stability of the PLL output frequency affected by the local oscillator is as follows, and the stability of the local oscillator greatly influences the stability of the PLL.

Next, when the frequency of a local oscillator in a PLL is greatly varied by a variable actance element, as shown in FIG. 2 as a conventional example, generally speaking, the stability of this local oscillator is ± This tends to be around 30 PPM, resulting in extremely poor overall stability.

Next, we will show a calculation example for the embodiment of FIG. 3 in which a frequency mixer and a local oscillator are placed outside the PLL and the oscillation frequency of the local oscillator is varied by a variable actance element.The frequency mixer output frequency ( f o) 1
50MHz PLL output frequency (fpt, t,)
1'20MHz PLL internal local oscillator output frequency (
f pL) 110MHz PLL external local oscillator output frequency (fL) 30MHz・°・f
Let O = f, PLL + fL, and the stability of the PLL internal local oscillator is ±IOPPM.

Since the PLL external local oscillator constant can be varied significantly with the actance element, if it is ±30PPM,
The stability of the PLL output frequency is based on the above relationship, and the influence of the PLL output frequency on the frequency mixer output frequency is = ±7.336PPM, and the PLL external local oscillator output on the frequency mixer output frequency is The frequency sound is fo 150X10=±6PPM, and the stability of the frequency mixer output frequency is =7.3
6 P PM+6 P PM=±13.336 PPM. Therefore, the stability in the case of Fig. 2 where the frequency of the local oscillator in the PLL is varied by a variable actance element is ±28.
Compared to PPM, it is a much smaller value and maintains good stability. Furthermore, in reality, the ±6PPM determined by the PLL external local oscillator output frequency and the ±7.336PPM determined by the PLL output frequency do not always deviate in the same direction, but simply in the same direction. is often smaller than the above value, which is the sum of both.

According to the present invention, the frequency step can be made small and the frequency can be continuously varied, and the circuit configuration can be simplified, the product price can be kept low, and the stability can be kept low. It is possible to improve the frequency and obtain a stable frequency even with temperature changes.

In addition, there are two methods of applying FM modulation within the PLL: modulating the voltage controlled oscillator and modulating the local oscillator within the PLL, but in either case, due to the relationship with the PLI lock-up time, the tone squelch It is difficult to modulate low frequencies such as
A frequency mixer and a local oscillator are provided outside L, and the output of the local oscillator is mixed with the PLL output, and 1.
Modulation is applied to the local oscillator, but according to the present invention, since the local oscillator is located outside the PLL, it is easy to apply modulation even at low frequencies, and there is no need to take the trouble to provide a separate modulation means. It is very advantageous to be able to directly modulate the actance element.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a phase-locked loop, FIG. 2 is a block diagram of a conventional frequency synthesizer, and FIG. 3 is a block diagram showing an embodiment of the present invention. 1... Reference oscillator -2... Phase detector 3... Low pass filter 4... Voltage controlled oscillator 5.8... Frequency mixer 6... Variable frequency divider 7, 9... Local oscillator 10... Crystal oscillator 11... Variable actance element 12...・・・
・Digital-to-analog converter 13...Digital circuit patent applicant Nippon Marantz Co., Ltd.■ 1-, ------11-----J

Claims (1)

[Claims] Outside the phase-locked loop, there is a local oscillator that is equipped with a variable actance element to make the oscillation frequency variable, a frequency mixer, and a frequency mixer that scales frequencies below the reference frequency of the phase-locked loop to have an arbitrary number of digits. A digital circuit that generates a digital signal and a digital-to-analog converter are provided,
The output frequency of the phase-locked loop and the output frequency of the local oscillator are frequency-mixed by a frequency mixer, and the output digital signal from the digital circuit is applied to the variable reactance element via the digital-to-analog converter. Features a frequency synthesizer.