JPS58100480A - Semiconductor laser device - Google Patents

Semiconductor laser device

Info

Publication number
JPS58100480A
JPS58100480A JP19771881A JP19771881A JPS58100480A JP S58100480 A JPS58100480 A JP S58100480A JP 19771881 A JP19771881 A JP 19771881A JP 19771881 A JP19771881 A JP 19771881A JP S58100480 A JPS58100480 A JP S58100480A
Authority
JP
Japan
Prior art keywords
type semiconductor
conductivity type
semiconductor layer
layer
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19771881A
Other languages
Japanese (ja)
Inventor
Yoshio Suzuki
鈴木 与志雄
Etsuo Noguchi
野口 悦男
Haruo Nagai
治男 永井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP19771881A priority Critical patent/JPS58100480A/en
Publication of JPS58100480A publication Critical patent/JPS58100480A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/06Arrangements for controlling the laser output parameters, e.g. by operating on the active medium

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To extract laser beams modulated at high speed, to miniaturize the device, to improve reliability and to reduce cost by flowing minute signal currents through a transistor element for modulation because a transistor amplifier for driving a laser is made contain into the same element. CONSTITUTION:An SiO2 film is formed onto a wafer through a sputtering method, a P type impurity is diffused up to depth reaching a semiconductor layer 4, and a first conductive type (P type) semiconductor region 11 is shaped. An ohmic electrode 15 for an N type semiconductor is formed and ohmic electrodes 13, 14 for a P type semiconductor to the surfaces of the P type semiconductor region 11 and a P type semiconductor substrate 10 respectively. A resonator at a proper interval is shaped through a means, such as cleavage, etching, etc. Accordingly, one semiconductor laser element is formed by semiconductor layers 1, 2, 3 and one NPN transistor by semiconductor layers 3, 4, 5.

Description

【発明の詳細な説明】 本発明は光ファイバを用いた光伝送方式の構成要素のう
ち、システムの小型化に向けて、同一素子内に変調用の
増幅器を含めた半導体レーザ装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor laser device that includes a modulation amplifier in the same element, among the components of an optical transmission system using optical fibers, in order to reduce the size of the system. .

光伝送用光源と貝、ての半導体レーザの駆動方法1は、
従来光源としての半導体レーザ素子が単体であったため
、光源と駆動回路を各々単独の部品で結合しなければな
らず、送信側装置、中継用増幅器、レーザ駆動用電源等
の複雑化、大型化、信頼性の低下等を生じるという欠点
があった。
Driving method 1 of a semiconductor laser using a light source for optical transmission and a shell is as follows.
Conventionally, the semiconductor laser element used as a light source was a single unit, so the light source and drive circuit had to be combined with each other as separate parts, making the transmitting side equipment, relay amplifier, laser drive power supply, etc. more complex, larger, and larger. This had the disadvantage of causing a decrease in reliability, etc.

本発明はこれらの欠点を解決するために、半導体レーザ
素子内に駆動用のトランジスタ増幅メー子を集積化した
構造の半導体レーザ装置を開発したものである。
In order to solve these drawbacks, the present invention has developed a semiconductor laser device having a structure in which a driving transistor amplifying meter is integrated within a semiconductor laser element.

以下、本発明を実施例によって詳細に説明する。Hereinafter, the present invention will be explained in detail with reference to Examples.

第1図は本発明の半導体レーザ装置の一実施例を示すも
ので、同図(a)は素子の模式的断面図と駆動回路、(
b)は装置の等節回路Cある。
FIG. 1 shows an embodiment of the semiconductor laser device of the present invention, and FIG. 1(a) is a schematic cross-sectional view of the device, a driving circuit,
b) is the isobaric circuit C of the device.

図において、1は第1導電形を導体層、2は第1又は第
2導電形半導体層からなる活性層、3は第2導電形半導
体層、4は第1導電形半導体層、5は第2導電形半導体
層、6は第2導電形半導体層、7は第1導電形半導体層
、8は第2導電形半導体層、9は第1導電形半導体層、
10は第1導電形半導体基板、11は第1導電形半導体
領域、12は絶縁膜、13及14は第1導電形半導体用
のオーミック電極、15は第2導電形半導体用のオーミ
ック電極、16は信号電流発生器、17は直流電源であ
る。
In the figure, 1 is a conductive layer of the first conductivity type, 2 is an active layer consisting of a first or second conductivity type semiconductor layer, 3 is a second conductivity type semiconductor layer, 4 is a first conductivity type semiconductor layer, and 5 is a first conductivity type semiconductor layer. 2 conductivity type semiconductor layer, 6 a second conductivity type semiconductor layer, 7 a first conductivity type semiconductor layer, 8 a second conductivity type semiconductor layer, 9 a first conductivity type semiconductor layer,
10 is a first conductivity type semiconductor substrate, 11 is a first conductivity type semiconductor region, 12 is an insulating film, 13 and 14 are ohmic electrodes for the first conductivity type semiconductor, 15 is an ohmic electrode for the second conductivity type semiconductor, 16 1 is a signal current generator, and 17 is a DC power supply.

次に、各部−の構成並に製造方法を説明するが、説明を
簡明にする為、半導体の材質、導電形及び印加電圧の極
性を規定して、良好な結果が得られた実施例について説
明するが、本発明はこれに限定されるものではなく、材
質の変更、導電形や印加電圧の゛極性を反対にした場合
にも本発明が適用されることは勿論である。
Next, the configuration and manufacturing method of each part will be explained. To simplify the explanation, we will explain an example in which good results were obtained by specifying the material of the semiconductor, the conductivity type, and the polarity of the applied voltage. However, the present invention is not limited to this, and it goes without saying that the present invention can also be applied to cases where the material is changed, the conductivity type, or the polarity of the applied voltage is reversed.

ここではGa InAsP / InP系の半導体を用
いた素子で、かつ第1導電形をp形、第2導電形をn形
として説明する。すなわち、第1図に付した各符号のも
のは下記の通りである。
Here, an element using a Ga InAsP/InP-based semiconductor will be described, and the first conductivity type is p-type and the second conductivity type is n-type. That is, each reference numeral in FIG. 1 is as follows.

10 : p形InP基板、厚み80μm、Znドープ
、キャリア密度5X1 o18cm−5、g−P−D 
5x1o’cm−2・ 1: p形InP層、厚み5μm、Znドープ、キャリ
ア密度7 X 10” cm−’。
10: p-type InP substrate, thickness 80 μm, Zn doping, carrier density 5X1 o18 cm-5, g-P-D
5 x 1 o'cm-2.1: p-type InP layer, thickness 5 μm, Zn doping, carrier density 7 x 10''cm-'.

2 ’  Ga0.24In0.74AS0.56PQ
、444元混晶層、厚み0.2μm、ドーパントなし。
2' Ga0.24In0.74AS0.56PQ
, 444-element mixed crystal layer, thickness 0.2 μm, no dopant.

3: n形InP層、厚み2/Jm、Teドープ、キャ
リア密度5X10Cm’。
3: n-type InP layer, thickness 2/Jm, Te doping, carrier density 5X10Cm'.

4: p形GaInAsP層(不純物拡散をストップす
るのに好都合)又はp形1nP層、厚み0.5μm。
4: p-type GaInAsP layer (convenient for stopping impurity diffusion) or p-type 1nP layer, thickness 0.5 μm.

Znドープ、キャリア密度7X10cm  ・5: n
形InP層、厚み2μm、Teドープ、キャリア密度5
X10Cm’。
Zn doped, carrier density 7 x 10 cm ・5: n
Type InP layer, thickness 2 μm, Te doped, carrier density 5
X10Cm'.

6: n形InP層・厚み2 /j+n、 Te )’
−プ、キャリア密度5X10  cm−3゜ 7: p形InP層、厚み2μn+、Znドープ、キャ
リア密度7X10  cm−’。
6: n-type InP layer, thickness 2 /j+n, Te)'
-p type, carrier density 5×10 cm−3°7: p-type InP layer, thickness 2 μn+, Zn doped, carrier density 7×10 cm−’.

8; n形InP層+  1.8μm+ Teドープ、
キャリア密度5X10  cm  a 9: p形InP層、厚み2.4μm、Znドープ。
8; n-type InP layer + 1.8 μm + Te doped,
Carrier density 5X10 cm a 9: p-type InP layer, thickness 2.4 μm, Zn doped.

キャリア密度7x10  cm  。Carrier density 7x10 cm.

上記の構成において、2及び4のGaInAsP 4元
混晶の格子定数はInP単結晶の格子定数に合致させて
おく。
In the above configuration, the lattice constants of the GaInAsP quaternary mixed crystals 2 and 4 are made to match the lattice constant of the InP single crystal.

第1図に示した構造を得るには、まず基板10上に液相
エピタキシャル成長法(LPg)あるいは気相エピタキ
シャル成長法(VPg )、分子線エピタキシャル成長
法(MBg)等により各半導体層1.2,3,4.5を
この順序で成長させる。
To obtain the structure shown in FIG. 1, first, each semiconductor layer 1.2, , 4.5 are grown in this order.

本実施例においては、液相エピタキシャル成長法すなわ
ち通常のいわゆるスライドボート法が用いられ、各半導
体層(結晶層)の成長温度は605℃から590℃の間
にある。次にこのレーザ素子及びトランジスタ素子を含
むヘテロ接合部分のメサエッチングのために、表面にス
パッタ法、CVD’″法等とホトリソグラフィ技術を用
いて絶縁膜(例えば5i02膜、 Az20.膜あるい
は5i5N4膜等)の適当な幅のストライプを形成する
。本実施例においては、スパッタ法により8i02膜を
形成し、ホトリソグラフィ技術を用いて幅20μmのス
トライプを形成した。次にこのストライプ状薄膜をエツ
チングマスクとして各半導体層の薄膜ストライプの下取
外の部分の結晶を化学エツチング等で取や去る。
In this example, a liquid phase epitaxial growth method, that is, a normal so-called slide boat method is used, and the growth temperature of each semiconductor layer (crystal layer) is between 605°C and 590°C. Next, for mesa etching of the heterojunction portion including the laser element and the transistor element, an insulating film (for example, 5i02 film, Az20. film, or 5i5N4 film) is formed on the surface using sputtering, CVD''', etc., and photolithography. etc.). In this example, an 8i02 film was formed by sputtering, and stripes with a width of 20 μm were formed using photolithography. Next, this striped thin film was etched with an etching mask. As a step, the crystals in the portions of the thin film stripes of each semiconductor layer that are not removed are removed by chemical etching or the like.

本実施例においては、Br2−メタノールによりメサエ
ッチングを行なった。その後このように結晶の取り去ら
れた部分に前述した何れかの結晶成長の手段(本実施例
では液相エピタキシャル成長法)を用いて、各半導体層
6,7,8.9をこの順序で順次成長させ埋め込み層を
形成し、前記ストライブ状エツチングマスクを取り去っ
てウェハを完成させる。その後さらに本ウェハ上にスパ
ッタ法。
In this example, mesa etching was performed using Br2-methanol. Thereafter, each semiconductor layer 6, 7, 8.9 is sequentially grown in this order on the portion where the crystal has been removed using any of the crystal growth methods described above (liquid phase epitaxial growth method in this example). A buried layer is grown and the striped etch mask is removed to complete the wafer. After that, sputtering was performed on the wafer.

CVD法等により絶縁膜(例工ば5i02膜、 kt2
05膜、 5i5N4膜等)12を形成する。本実施例
ではスパッタ法により8i502膜を形成した。次いで
、半導体層5上の絶縁膜12の一部をホトリソグラフィ
技術を用いて剥離し、閉管法、開管法等の手段を用いて
Zn’、 Cd等のp形不純物を半導体層4に達するま
での深さに拡散し、第1導電形(p形)半導体領域11
 を形成する。本実施例では、絶縁@ (5i02膜)
12に5μmX50μmの窓をホトリソグラフィ技術を
用いて開け、閉管法によりZnを半導体層4に達するま
で拡散し、p形半導体領域11を形成した。さらに再度
ホトリソグラフィ技術により、n形半導体結晶(半導体
層5)上の絶縁膜12の一部をはがして、n形半導体用
のオーミック電極15を、p形半導体領域11 とp形
半導体基板100表面にそれぞれn形半導体用のオーミ
ック電極13.14を形成する。この時、リフトオフ法
、化学エツチング法等を用いて、電極13と電極15は
分離する。本実施例では、絶縁膜12に5μmX100
μmの窓を開け、電極15としてAu GeNi合金を
真空蒸着法で形成した。電極13.14としてはAu 
Zn合金を真空蒸着法で形成した。
Insulating film (for example, 5i02 film, kt2 film) by CVD method etc.
05 film, 5i5N4 film, etc.) 12 is formed. In this example, an 8i502 film was formed by sputtering. Next, a part of the insulating film 12 on the semiconductor layer 5 is peeled off using photolithography technology, and p-type impurities such as Zn' and Cd are applied to the semiconductor layer 4 using means such as a closed tube method or an open tube method. the first conductivity type (p-type) semiconductor region 11
form. In this example, insulation @ (5i02 film)
A window of 5 .mu.m.times.50 .mu.m was opened in 12 using photolithography technology, and Zn was diffused by a closed tube method until it reached the semiconductor layer 4, thereby forming a p-type semiconductor region 11. Further, by using photolithography again, a part of the insulating film 12 on the n-type semiconductor crystal (semiconductor layer 5) is peeled off, and an ohmic electrode 15 for the n-type semiconductor is formed between the p-type semiconductor region 11 and the surface of the p-type semiconductor substrate 100. Ohmic electrodes 13 and 14 for n-type semiconductors are formed on each of the substrates. At this time, the electrodes 13 and 15 are separated using a lift-off method, a chemical etching method, or the like. In this embodiment, the insulating film 12 has a size of 5 μm×100
A μm window was opened, and an AuGeNi alloy was formed as the electrode 15 by vacuum evaporation. The electrodes 13 and 14 are made of Au.
A Zn alloy was formed by vacuum evaporation.

その後第1図の紙面に平行方向にへき開、エツチング等
の手段で適当な間隔(例えば200〜600μm)の共
振器を形成する。本実施例では、へき開して共振器長2
00μm2幅400μmの素子とした。
Thereafter, resonators with appropriate spacing (for example, 200 to 600 μm) are formed by cleaving, etching, or the like in a direction parallel to the paper plane of FIG. In this example, the resonator length is 2 by cleavage.
The device had a width of 00 μm2 and a width of 400 μm.

以上の結果、半導体層1.2.3によって1つの半導体
レーザ素子、半導体層3,4.5によって1つのnpn
 )ランジスタ(変調器)が形成される。
As a result of the above, one semiconductor laser element is formed by semiconductor layers 1.2.3, and one npn is formed by semiconductor layers 3 and 4.5.
) transistors (modulators) are formed.

こうして得られた半導体レーザ装置を電極14を下にし
てメタルコートされたダイヤモンドヒートシンク上にA
u8nノ・ンダを用いてマウントし、第1図(a)に示
したように、電極14と15の組み合わせについては電
極14を正に電極15を負に直流電源17を接続し、電
極13と15の組み合わせについては電極13を正に電
極15を負に信号電流発生器16を結合し、トランジス
タのベース、エミッタに当る電極13.15間に信号電
流を加えると、トランジスタの電流増幅率α倍された電
流が半導体レーザ活性層2に注入され、レーザ発振を得
ることができる。
The semiconductor laser device thus obtained was placed on a metal-coated diamond heat sink with the electrode 14 facing down.
As shown in FIG. 1(a), for the combination of electrodes 14 and 15, connect electrode 14 to positive, electrode 15 to negative, and connect DC power supply 17. For the combination 15, when the signal current generator 16 is connected to the electrode 13 as positive and the electrode 15 as negative, and a signal current is applied between the electrodes 13 and 15 corresponding to the base and emitter of the transistor, the current amplification factor of the transistor is multiplied by α. The generated current is injected into the semiconductor laser active layer 2, and laser oscillation can be obtained.

本実施例の半導体レーザ装置において、電極15゜15
間に2mAの電流を通電したところ、室温25℃におい
て信号電流に対応したレーザ発振を得た。
In the semiconductor laser device of this example, the electrode 15°15
When a current of 2 mA was passed between them, laser oscillation corresponding to the signal current was obtained at a room temperature of 25°C.

その波長は約1.53μmであった。なお、この時の信
号電流の繰返し速度として200 Mbit/sまでレ
ーザ発振波形を観測することができた。
Its wavelength was approximately 1.53 μm. Note that the laser oscillation waveform could be observed at a repetition rate of the signal current up to 200 Mbit/s at this time.

以上説明したように、本発明の半導体レーザ装置は、レ
ーザ駆動用のトランジスタ増幅器すなわち変調器が同一
素子内に含まれているため、単独の変調器を必要とせず
、微小な信号電流を変調用トランジスタ素子に流すこと
により高速変調されたレーザ光を取り出すことができる
。従って、例えば光1市信方式の中継器等に本発明の半
導体レーザ装置を使用した場合、装置の小型化、高信頼
化低コスト化が可能である。
As explained above, the semiconductor laser device of the present invention includes a transistor amplifier for driving the laser, that is, a modulator in the same element, and therefore does not require a separate modulator, and can use a small signal current for modulation. High-speed modulated laser light can be extracted by flowing it through a transistor element. Therefore, when the semiconductor laser device of the present invention is used, for example, in a repeater of the optical 1-communication system, the device can be made smaller, more reliable, and lower in cost.

なお、本発明の半導体V−ザ装置を実現するためには、
GaInAsP/InP系の材料の他に、GaAAAs
 / GaAs系、 GaAAAsSb/GaSb系材
料等も用いることがで色材料は言うまでもないことであ
る。
Note that in order to realize the semiconductor V-za device of the present invention,
In addition to GaInAsP/InP materials, GaAAAs
/GaAs-based materials, GaAAAsSb/GaSb-based materials, etc. can also be used, and it goes without saying that color materials can also be used.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の半導体レーザ装置の一実施例を示すも
ので、同図(a)は素子の模式的断面図と駆動回路、(
b)は装置の等価回路である。 1・・・第1導電形半導体層 2・・・第1又は第2導電形半導体層からなる活性層 6・・・第2導電形半導体層 4・・・第1導電形半導体層 5・・・第2導電形半導体層 6・・・第2導電形半導体層 7・・・第1導電形半導体層 8・・・第2導電形半導体層 9・・・第1導電形半導体層 10・・・第1導電形半導体基板 11・・・第1導電形半導体領域 12・・・絶縁膜 13.14・・・第1導電形半導体用のオーミック電極 15・・・第2導電形半導体用のオーミック電極16・
・・信号電流発生器 17・・・直流電源 特許出願人 日本電信電話公社 代理人弁理士 中村純之助
FIG. 1 shows an embodiment of the semiconductor laser device of the present invention, and FIG. 1(a) is a schematic cross-sectional view of the device, a driving circuit,
b) is the equivalent circuit of the device. 1... First conductivity type semiconductor layer 2... Active layer 6 consisting of a first or second conductivity type semiconductor layer... Second conductivity type semiconductor layer 4... First conductivity type semiconductor layer 5... - Second conductivity type semiconductor layer 6... Second conductivity type semiconductor layer 7... First conductivity type semiconductor layer 8... Second conductivity type semiconductor layer 9... First conductivity type semiconductor layer 10...・First conductivity type semiconductor substrate 11...First conductivity type semiconductor region 12...Insulating film 13.14...Ohmic electrode 15 for first conductivity type semiconductor...Ohmic for second conductivity type semiconductor Electrode 16・
...Signal current generator 17...DC power supply patent applicant Junnosuke Nakamura, patent attorney representing Nippon Telegraph and Telephone Public Corporation

Claims (1)

【特許請求の範囲】 同一素子内にトランジスタ増幅器を有する埋め込み形半
導体レーザダイオードであって、〜活性層(2)を含む
ペテロ接合部は第1導電形半導体基板(10)上に形成
され、その構造は基板側から頴に第1導電形半導体層(
1)、第1又は第2導電形半導体層からなる活性層(2
)、第2導電形半導体層(55第1導電形半導体層(4
)、第2導電形半導体層(5)・であり、埋め込み結晶
層の構造は基板側から順に・第2導電形半導体層(6)
、第1導電形半導体層(7)・。 第2導電形半導体層(8)、第1導電形半導体層(9)
・からなり、上記第2導電形半導体層(5)の一部を第
1導電形半導体層(4)に達するまで不純物を拡散又は
イオン打込みによって第1導電形半導体に変換した第1
導電形半導体領域(11)を設け、上記第1導電形半導
体領域(11)、第2導電形半導体゛層(5)及び第1
導電形半導体基板(1o)にそれぞれ電極(13)、 
(15)及び(14)を設け、上記電極(15)と電極
(14)の間に直流電圧を加えた状態で電極(16)と
電極(15)の間に信号電流を通じることにより、第2
導電形半導体層(3)、第1導電形半導体層(4)第2
導電形半導体層(5)より形成されるトランジスタ増幅
器の電流増幅率0倍の注入電流を活性層(2)を通じて
流すことができ、それに応じたレーザ発振を活性層(2
)より得るεとを特徴とする半導体レーザ装置。
[Claims] An embedded semiconductor laser diode having a transistor amplifier in the same device, wherein a Peter junction including an active layer (2) is formed on a first conductivity type semiconductor substrate (10), The structure consists of a first conductivity type semiconductor layer (
1), an active layer (2) consisting of a first or second conductivity type semiconductor layer;
), second conductivity type semiconductor layer (55 first conductivity type semiconductor layer (4)
), the second conductivity type semiconductor layer (5), and the structure of the buried crystal layer is, in order from the substrate side, the second conductivity type semiconductor layer (6).
, first conductivity type semiconductor layer (7). Second conductivity type semiconductor layer (8), first conductivity type semiconductor layer (9)
- a first conductivity type semiconductor in which a part of the second conductivity type semiconductor layer (5) is converted into a first conductivity type semiconductor by diffusion or ion implantation of impurities until it reaches the first conductivity type semiconductor layer (4);
A conductivity type semiconductor region (11) is provided, and the first conductivity type semiconductor region (11), the second conductivity type semiconductor layer (5) and the first conductivity type semiconductor region (11) are provided.
Electrodes (13) on the conductive semiconductor substrate (1o),
(15) and (14) are provided, and a signal current is passed between the electrode (16) and the electrode (15) with a DC voltage applied between the electrode (15) and the electrode (14). 2
conductive type semiconductor layer (3), first conductive type semiconductor layer (4) second
An injected current with a current amplification factor of 0 times the current amplification factor of the transistor amplifier formed from the conductive semiconductor layer (5) can flow through the active layer (2), and laser oscillation corresponding to the current amplification rate can be caused by the active layer (2).
) A semiconductor laser device characterized by ε obtained from ε.
JP19771881A 1981-12-10 1981-12-10 Semiconductor laser device Pending JPS58100480A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19771881A JPS58100480A (en) 1981-12-10 1981-12-10 Semiconductor laser device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19771881A JPS58100480A (en) 1981-12-10 1981-12-10 Semiconductor laser device

Publications (1)

Publication Number Publication Date
JPS58100480A true JPS58100480A (en) 1983-06-15

Family

ID=16379194

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19771881A Pending JPS58100480A (en) 1981-12-10 1981-12-10 Semiconductor laser device

Country Status (1)

Country Link
JP (1) JPS58100480A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6059791A (en) * 1983-09-13 1985-04-06 Toyota Central Res & Dev Lab Inc Integrated opticalsemiconductor device
US4845723A (en) * 1987-02-20 1989-07-04 Siemens Aktiengesellschaft Laser transmitter arrangement

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5414692A (en) * 1977-07-05 1979-02-03 Fujitsu Ltd Liminous semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5414692A (en) * 1977-07-05 1979-02-03 Fujitsu Ltd Liminous semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6059791A (en) * 1983-09-13 1985-04-06 Toyota Central Res & Dev Lab Inc Integrated opticalsemiconductor device
US4845723A (en) * 1987-02-20 1989-07-04 Siemens Aktiengesellschaft Laser transmitter arrangement

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