JPS5795752A - System for generation of silent pattern - Google Patents

System for generation of silent pattern

Info

Publication number
JPS5795752A
JPS5795752A JP17178180A JP17178180A JPS5795752A JP S5795752 A JPS5795752 A JP S5795752A JP 17178180 A JP17178180 A JP 17178180A JP 17178180 A JP17178180 A JP 17178180A JP S5795752 A JPS5795752 A JP S5795752A
Authority
JP
Japan
Prior art keywords
demodulator
pattern
counter
silent
digits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17178180A
Other languages
Japanese (ja)
Inventor
Masato Fujisawa
Kiyoshi Shibuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17178180A priority Critical patent/JPS5795752A/en
Publication of JPS5795752A publication Critical patent/JPS5795752A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M19/00—Current supply arrangements for telephone systems
    • H04M19/02—Current supply arrangements for telephone systems providing ringing current or supervisory tones, e.g. dialling tone or busy tone

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Devices For Supply Of Signal Current (AREA)

Abstract

PURPOSE:To prevent the click noise, by synthesizing repsective outputs of digits of a counter and inputting them to a demodulator so that the output of the demodulator has sharp rise and fall in the silent pattern generation system for the exchange of the modulation system. CONSTITUTION:A counter 24 which counts clocks and consists of plural digits is used, and respective outputs of digits of the counter 24 are combined properly to generate a silent signal pattern S4, and this pattern is inputted to a demodulator 12, and such silent signal pattern S4 is transmitted that the output of the demodulator 12 becomes level 0. By this silent signal pattern S4, a click noise CN does not occur.
JP17178180A 1980-12-05 1980-12-05 System for generation of silent pattern Pending JPS5795752A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17178180A JPS5795752A (en) 1980-12-05 1980-12-05 System for generation of silent pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17178180A JPS5795752A (en) 1980-12-05 1980-12-05 System for generation of silent pattern

Publications (1)

Publication Number Publication Date
JPS5795752A true JPS5795752A (en) 1982-06-14

Family

ID=15929556

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17178180A Pending JPS5795752A (en) 1980-12-05 1980-12-05 System for generation of silent pattern

Country Status (1)

Country Link
JP (1) JPS5795752A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS617794A (en) * 1984-06-22 1986-01-14 Toshiba Corp Dial pulse transmission system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS617794A (en) * 1984-06-22 1986-01-14 Toshiba Corp Dial pulse transmission system
JPH078057B2 (en) * 1984-06-22 1995-01-30 株式会社東芝 Electronic exchange

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