JPS579146A - Control circuit for transmission timing - Google Patents

Control circuit for transmission timing

Info

Publication number
JPS579146A
JPS579146A JP8483480A JP8483480A JPS579146A JP S579146 A JPS579146 A JP S579146A JP 8483480 A JP8483480 A JP 8483480A JP 8483480 A JP8483480 A JP 8483480A JP S579146 A JPS579146 A JP S579146A
Authority
JP
Japan
Prior art keywords
data
signal
start signal
control circuit
count
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8483480A
Other languages
Japanese (ja)
Inventor
Tsutomu Iwahashi
Hisaaki Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8483480A priority Critical patent/JPS579146A/en
Publication of JPS579146A publication Critical patent/JPS579146A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/05—Electric or magnetic storage of signals before transmitting or retransmitting for changing the transmission rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To make a transmission timing control circuit cheaper and to omit the time to transmit data to memories, by using a shift register having the number of steps absorbing an indefinite time in place of the memories. CONSTITUTION:An output start signal 7a is given to a asynchronous data generator 1 from a data transmission start signal 7b and te count-down operation is started in the shift unit time of shift registers 2a, 2c to a down counter 15. Further, when a data head detecting circuit 3 detects the head position of a data 9a, a data head detection signal 12 is outputted, and the down counter 15 stops the count down operation and a count value signal 17 is applied to a data selector 18. Next, when a data transmission start signal 7b is added to the counter 15, the data of a shift register 2c is selected and outputted by the data length of the generator 1, with the signal 17 to the data selector 18.
JP8483480A 1980-06-19 1980-06-19 Control circuit for transmission timing Pending JPS579146A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8483480A JPS579146A (en) 1980-06-19 1980-06-19 Control circuit for transmission timing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8483480A JPS579146A (en) 1980-06-19 1980-06-19 Control circuit for transmission timing

Publications (1)

Publication Number Publication Date
JPS579146A true JPS579146A (en) 1982-01-18

Family

ID=13841805

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8483480A Pending JPS579146A (en) 1980-06-19 1980-06-19 Control circuit for transmission timing

Country Status (1)

Country Link
JP (1) JPS579146A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59123333A (en) * 1982-12-29 1984-07-17 Fujitsu Ltd System for converting data transfer speed

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59123333A (en) * 1982-12-29 1984-07-17 Fujitsu Ltd System for converting data transfer speed

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