JPS5790332A - Paper size display unit - Google Patents

Paper size display unit

Info

Publication number
JPS5790332A
JPS5790332A JP55163191A JP16319180A JPS5790332A JP S5790332 A JPS5790332 A JP S5790332A JP 55163191 A JP55163191 A JP 55163191A JP 16319180 A JP16319180 A JP 16319180A JP S5790332 A JPS5790332 A JP S5790332A
Authority
JP
Japan
Prior art keywords
paper size
display
circuits
level
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55163191A
Other languages
Japanese (ja)
Inventor
Yoshiharu Manabe
Shigeru Muramatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP55163191A priority Critical patent/JPS5790332A/en
Publication of JPS5790332A publication Critical patent/JPS5790332A/en
Pending legal-status Critical Current

Links

Landscapes

  • Paper Feeding For Electrophotography (AREA)
  • Control Or Security For Electrophotography (AREA)
  • Sheets, Magazines, And Separation Thereof (AREA)

Abstract

PURPOSE: To reduce the space of display and enhance its visualization by entering more than 2 sorts of paper size display pattern in the same plane of one indicator in a paper size display device for a copier etc.
CONSTITUTION: A liquid crystal cell 11 is formed with segment electrodes on the internal surface of its glass together with a row of pattern (81 1/2 1"'×1174") to display 3 sorts of paper size. This liquid crystal display cell 11 is driven in such a way that the input to either one of OR circuits 12, 13 goes up to H level when the paper size detecting signal SA reaches H level, and the phase of the output from EX-OR circuits 14, 15 is set reverse to that of a pulse signal SP, because the input to either one of EX-OR circuits 16, 17 stays at L level, consequently generating a potential difference between terminals P, Q and common edge C to proceed to pattern display of (8 1/2"×11"). Besides, patterns, (8 1/2"× 14") and (11"×17") are displayed by signal SB and SC respectively.
COPYRIGHT: (C)1982,JPO&Japio
JP55163191A 1980-11-21 1980-11-21 Paper size display unit Pending JPS5790332A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55163191A JPS5790332A (en) 1980-11-21 1980-11-21 Paper size display unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55163191A JPS5790332A (en) 1980-11-21 1980-11-21 Paper size display unit

Publications (1)

Publication Number Publication Date
JPS5790332A true JPS5790332A (en) 1982-06-05

Family

ID=15768990

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55163191A Pending JPS5790332A (en) 1980-11-21 1980-11-21 Paper size display unit

Country Status (1)

Country Link
JP (1) JPS5790332A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6211835U (en) * 1985-07-08 1987-01-24

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6211835U (en) * 1985-07-08 1987-01-24
JPH0529480Y2 (en) * 1985-07-08 1993-07-28

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