JPS5786937A - Signal waveform storage device - Google Patents
Signal waveform storage deviceInfo
- Publication number
- JPS5786937A JPS5786937A JP16391280A JP16391280A JPS5786937A JP S5786937 A JPS5786937 A JP S5786937A JP 16391280 A JP16391280 A JP 16391280A JP 16391280 A JP16391280 A JP 16391280A JP S5786937 A JPS5786937 A JP S5786937A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- sampling
- clock pulses
- converter
- signal waveform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
- G11C27/02—Sample-and-hold arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/001—Analogue/digital/analogue conversion
Abstract
PURPOSE:To store a signal waveform efficiently by adequately controlling intervals of sampling clock pulses and those of readout clock pules on the basis of differences between adjacent sampled values. CONSTITUTION:A sequence of digitized sampling pulses from an A/D converter 70 is written in a digital memory 80 successively. To read the contents of the memory 80, on the other hand, switches 81 and 82 are changed over to sides (b) to input the output of a D/A converter 83, provided on the output side of the memory 80, to a difference detector 23, and also to supply readout clock pulses from an oscillator 24 to the memory 80. The detector 23 calculates intervals of clock pulses from the sampling sequence stored in the memory 80 to control the frequency of readout clock pulses of the memory 80. Consequently, a sampling sequence having the same array with the sampling sequence obtained from a sampling circuit 22 is outputted 84 through the D/A converter 83 from the memory 80.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16391280A JPS5786937A (en) | 1980-11-20 | 1980-11-20 | Signal waveform storage device |
EP81302611A EP0043652B1 (en) | 1980-06-20 | 1981-06-11 | Sampled signal generation circuit |
DE8181302611T DE3173288D1 (en) | 1980-06-20 | 1981-06-11 | Sampled signal generation circuit |
US06/485,135 US4496937A (en) | 1980-06-20 | 1983-04-20 | Sampled signal generation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16391280A JPS5786937A (en) | 1980-11-20 | 1980-11-20 | Signal waveform storage device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5786937A true JPS5786937A (en) | 1982-05-31 |
Family
ID=15783181
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16391280A Pending JPS5786937A (en) | 1980-06-20 | 1980-11-20 | Signal waveform storage device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5786937A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04137821A (en) * | 1990-09-27 | 1992-05-12 | Sharp Corp | A/d converter |
-
1980
- 1980-11-20 JP JP16391280A patent/JPS5786937A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04137821A (en) * | 1990-09-27 | 1992-05-12 | Sharp Corp | A/d converter |
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