JPS5773531A - Pulse counter - Google Patents

Pulse counter

Info

Publication number
JPS5773531A
JPS5773531A JP14955780A JP14955780A JPS5773531A JP S5773531 A JPS5773531 A JP S5773531A JP 14955780 A JP14955780 A JP 14955780A JP 14955780 A JP14955780 A JP 14955780A JP S5773531 A JPS5773531 A JP S5773531A
Authority
JP
Japan
Prior art keywords
circuit
pulse
level
pulse width
given
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14955780A
Other languages
Japanese (ja)
Inventor
Masao Matsushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP14955780A priority Critical patent/JPS5773531A/en
Publication of JPS5773531A publication Critical patent/JPS5773531A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K21/00Details of pulse counters or frequency dividers
    • H03K21/02Input circuits

Landscapes

  • Measurement Of Unknown Time Intervals (AREA)

Abstract

PURPOSE:To measure the number of pulses within an arbitray period easily, by providing a level discriminating circuit of pulse signal passing through a switch circuit, a control section setting a count period and a pulse width discriminating circuit at the output. CONSTITUTION:A pulse signal P is given to a switch circuit SW, and the pulse signal passing through the circuit SW according to the pulse count period set to a control section CONT is given to a level discrimination circuit LD with a start switch Ss and stop switch Se manual operation or external trigger signals Ts, Te. The pulse signal only corresponding to the set level with a level set section LST is given to a pulse width discrminating circuit WD. The circuit WD passes through the output of the circuit LD only corresponding to the set pulse width with a pulse width set section WST, and the result of the signal measured at a counter CT is displayed on a display section DP.
JP14955780A 1980-10-25 1980-10-25 Pulse counter Pending JPS5773531A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14955780A JPS5773531A (en) 1980-10-25 1980-10-25 Pulse counter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14955780A JPS5773531A (en) 1980-10-25 1980-10-25 Pulse counter

Publications (1)

Publication Number Publication Date
JPS5773531A true JPS5773531A (en) 1982-05-08

Family

ID=15477766

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14955780A Pending JPS5773531A (en) 1980-10-25 1980-10-25 Pulse counter

Country Status (1)

Country Link
JP (1) JPS5773531A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016046795A (en) * 2014-08-21 2016-04-04 正仁 櫨田 Circuit for generating accurate one second pulse-width for frequency counter and start/stop timing for counter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016046795A (en) * 2014-08-21 2016-04-04 正仁 櫨田 Circuit for generating accurate one second pulse-width for frequency counter and start/stop timing for counter

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