JPS5769335U - - Google Patents

Info

Publication number
JPS5769335U
JPS5769335U JP1980146710U JP14671080U JPS5769335U JP S5769335 U JPS5769335 U JP S5769335U JP 1980146710 U JP1980146710 U JP 1980146710U JP 14671080 U JP14671080 U JP 14671080U JP S5769335 U JPS5769335 U JP S5769335U
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1980146710U
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1980146710U priority Critical patent/JPS5769335U/ja
Priority to GB8130836A priority patent/GB2088166B/en
Publication of JPS5769335U publication Critical patent/JPS5769335U/ja
Priority to US06/726,933 priority patent/US4567575A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/01855—Interface arrangements synchronous, i.e. using clock signals
JP1980146710U 1980-10-14 1980-10-14 Pending JPS5769335U (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP1980146710U JPS5769335U (ja) 1980-10-14 1980-10-14
GB8130836A GB2088166B (en) 1980-10-14 1981-10-13 Logic interface circuit
US06/726,933 US4567575A (en) 1980-10-14 1985-04-26 Voltage level compensating interface circuit for inter-logic circuit data transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1980146710U JPS5769335U (ja) 1980-10-14 1980-10-14

Publications (1)

Publication Number Publication Date
JPS5769335U true JPS5769335U (ja) 1982-04-26

Family

ID=15413783

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1980146710U Pending JPS5769335U (ja) 1980-10-14 1980-10-14

Country Status (3)

Country Link
US (1) US4567575A (ja)
JP (1) JPS5769335U (ja)
GB (1) GB2088166B (ja)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6342215A (ja) * 1986-08-07 1988-02-23 Canon Inc 電子機器
US4837736A (en) * 1987-05-01 1989-06-06 Digital Equipment Corporation Backplane bus with default control
EP0312573B1 (en) * 1987-05-01 1993-09-01 Digital Equipment Corporation Backplane bus
US5003467A (en) * 1987-05-01 1991-03-26 Digital Equipment Corporation Node adapted for backplane bus with default control
US5237221A (en) * 1991-11-25 1993-08-17 Hewlett-Packard Company On-chip pull-up circuit which may be selectively disabled
JP2005092480A (ja) * 2003-09-17 2005-04-07 Hitachi Global Storage Technologies Netherlands Bv インターフェース回路及び電子機器
US7239020B2 (en) * 2004-05-06 2007-07-03 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Multi-mode integrated circuit structure
US20090132404A1 (en) * 2007-11-21 2009-05-21 Marie King Apportioning fraud liability

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS522235A (en) * 1975-06-24 1977-01-08 Hitachi Ltd Push-pull circuit

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3757310A (en) * 1972-01-03 1973-09-04 Honeywell Inf Systems Memory address selction apparatus including isolation circuits
US3835457A (en) * 1972-12-07 1974-09-10 Motorola Inc Dynamic mos ttl compatible
US3906453A (en) * 1974-03-27 1975-09-16 Victor Comptometer Corp Care memory control circuit
US4000413A (en) * 1975-05-27 1976-12-28 Intel Corporation Mos-ram
US4306163A (en) * 1975-12-01 1981-12-15 Intel Corporation Programmable single chip MOS computer
US4075679A (en) * 1975-12-08 1978-02-21 Hewlett-Packard Company Programmable calculator
US4048673A (en) * 1976-02-27 1977-09-13 Data General Corporation Cpu - i/o bus interface for a data processing system
US4096398A (en) * 1977-02-23 1978-06-20 National Semiconductor Corporation MOS output buffer circuit with feedback
US4213189A (en) * 1977-06-13 1980-07-15 Admiral Corporation Reactive computer system adaptive to a plurality of program inputs
US4110633A (en) * 1977-06-30 1978-08-29 International Business Machines Corporation Depletion/enhancement mode FET logic circuit
US4134103A (en) * 1977-08-11 1979-01-09 Caterpillar Tractor Co. Error-rejecting data transmission system
DE2838817A1 (de) * 1978-09-06 1980-03-20 Ibm Deutschland Ttl-kompatible adressverriegelungsschaltung mit feldeffekttransistoren und entsprechendes betriebsverfahren
US4195356A (en) * 1978-11-16 1980-03-25 Electronic Memories And Magnetics Corporation Sense line termination circuit for semiconductor memory systems
US4275313A (en) * 1979-04-09 1981-06-23 Bell Telephone Laboratories, Incorporated Current limiting output circuit with output feedback
US4276617A (en) * 1979-06-28 1981-06-30 Raytheon Company Transistor switching circuitry
US4357548A (en) * 1980-05-30 1982-11-02 Rca Corporation Circuit arrangement using emitter coupled logic and integrated injection logic
US4451907A (en) * 1981-10-26 1984-05-29 Motorola, Inc. Pull-up circuit for a memory
US4472647A (en) * 1982-08-20 1984-09-18 Motorola, Inc. Circuit for interfacing with both TTL and CMOS voltage levels

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS522235A (en) * 1975-06-24 1977-01-08 Hitachi Ltd Push-pull circuit

Also Published As

Publication number Publication date
US4567575A (en) 1986-01-28
GB2088166B (en) 1984-09-12
GB2088166A (en) 1982-06-03

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