JPS5764802A - Controller - Google Patents
ControllerInfo
- Publication number
- JPS5764802A JPS5764802A JP13974880A JP13974880A JPS5764802A JP S5764802 A JPS5764802 A JP S5764802A JP 13974880 A JP13974880 A JP 13974880A JP 13974880 A JP13974880 A JP 13974880A JP S5764802 A JPS5764802 A JP S5764802A
- Authority
- JP
- Japan
- Prior art keywords
- board
- printed circuit
- contact
- relay
- boards
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
- G01R31/2808—Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Safety Devices In Control Systems (AREA)
Abstract
PURPOSE:To facilitate the exchanging work of the printed circuit boards, by forming a consecutive signal route with the wiring between a conductor pattern on a printed circuit board and a connector of the printed circuit boards. CONSTITUTION:When a fault arises to a printed circuit board 2 and either one of the boards 2 is pulled out of a storing case 1, the closed circuits so far formed with a contact between the contact plug pattern of the board 2 and a contact and connected in series to a terminal 4 of each terminal 3 by electric wires 6 are opened. As a result, the energizing of a relay 7 is released to open relay auxiliary contacts 7a and 7b. Thus a control circuit 9 turns on a fault display device 10. When the repaired board 2 is set again to the original connector 3, a series connection is secured between the contact plug pattern of each board 2 and a contact. Thus the original state is reset. In this moment, a push-button switch 8 is pushed, the relay 7 is energized to close the contacts 7a and 7b. Thus a holding circuit is formed, and the device 10 discontinues its lighting to be reset to the original state of operation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13974880A JPS5764802A (en) | 1980-10-08 | 1980-10-08 | Controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13974880A JPS5764802A (en) | 1980-10-08 | 1980-10-08 | Controller |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5764802A true JPS5764802A (en) | 1982-04-20 |
Family
ID=15252457
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13974880A Pending JPS5764802A (en) | 1980-10-08 | 1980-10-08 | Controller |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5764802A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6170202U (en) * | 1984-10-09 | 1986-05-14 | ||
US5345367A (en) * | 1992-09-22 | 1994-09-06 | Intel Corporation | Thin form factor computer card |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4979122A (en) * | 1972-12-02 | 1974-07-31 | ||
JPS5450772A (en) * | 1977-09-29 | 1979-04-20 | Toshiba Corp | Erroneous control preventive method in process control system |
-
1980
- 1980-10-08 JP JP13974880A patent/JPS5764802A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4979122A (en) * | 1972-12-02 | 1974-07-31 | ||
JPS5450772A (en) * | 1977-09-29 | 1979-04-20 | Toshiba Corp | Erroneous control preventive method in process control system |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6170202U (en) * | 1984-10-09 | 1986-05-14 | ||
US5345367A (en) * | 1992-09-22 | 1994-09-06 | Intel Corporation | Thin form factor computer card |
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