JPS5758483A - Digitan transmission system - Google Patents
Digitan transmission systemInfo
- Publication number
- JPS5758483A JPS5758483A JP13321380A JP13321380A JPS5758483A JP S5758483 A JPS5758483 A JP S5758483A JP 13321380 A JP13321380 A JP 13321380A JP 13321380 A JP13321380 A JP 13321380A JP S5758483 A JPS5758483 A JP S5758483A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- bit
- delayed
- cri
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
- H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Television Systems (AREA)
Abstract
PURPOSE:To ensure data sampling accurately, by giving a delay almost equal to a data signal, to a clock line signal via a transmission line before the data sampling point in a receiver from a transmitter. CONSTITUTION:A clock line CRI signal in 16-bit consists of 15-bit consisting of ''1'' and ''0'' consecutiveness at every 3-bit and ''0'' remaining 1-bit. In this cae, a sampling pulse forming circuit 4 is reset with the leading of the second times of the CRI signal. Thus, the CRI signal is subjected to the effect of a low frequency section of group delay characteristics, allowing to the delayed or advanced the same as the data signal. Thus, the sampling pulse formed by taking the 2nd leading of the CRI signal as the time reference can be delayed, and the phase difference with a delayed data signal is made smaller, allowing to compensate the lowering in the ratio of eye height.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13321380A JPS5758483A (en) | 1980-09-24 | 1980-09-24 | Digitan transmission system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13321380A JPS5758483A (en) | 1980-09-24 | 1980-09-24 | Digitan transmission system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5758483A true JPS5758483A (en) | 1982-04-08 |
Family
ID=15099365
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13321380A Pending JPS5758483A (en) | 1980-09-24 | 1980-09-24 | Digitan transmission system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5758483A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60141910A (en) * | 1983-12-28 | 1985-07-27 | 東芝機械株式会社 | Automatic marking apparatus of road mark pattern |
US5565997A (en) * | 1993-01-28 | 1996-10-15 | U.S. Philips Corporation | Device and method for data recording and/or reproducting data multiplexed with video and/or audio signals |
-
1980
- 1980-09-24 JP JP13321380A patent/JPS5758483A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60141910A (en) * | 1983-12-28 | 1985-07-27 | 東芝機械株式会社 | Automatic marking apparatus of road mark pattern |
US5565997A (en) * | 1993-01-28 | 1996-10-15 | U.S. Philips Corporation | Device and method for data recording and/or reproducting data multiplexed with video and/or audio signals |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS52125301A (en) | Signal processing circuit | |
JPS5758483A (en) | Digitan transmission system | |
JPS548451A (en) | Digital-type frequency adjusting circuit | |
DE3165765D1 (en) | Frequency demodulator using a delay circuit, the delay of which varies according to the received frequency | |
JPS5329011A (en) | Signal transmitter | |
JPS5428559A (en) | Signal delay device | |
JPS53139456A (en) | Clock driver circuit | |
JPS56149121A (en) | Phase synchronizing circuit | |
JPS5397328A (en) | Electronic zooming system for charge transfer type pickup element | |
JPS5312215A (en) | Pulse transfer circuit | |
JPS5430060A (en) | Dislocation detecting circuit | |
JPS53116018A (en) | Automatic frequency control system for ssb receivers | |
JPS549526A (en) | Plural signal difference encoding system | |
JPS5211735A (en) | Signal transmission system | |
JPS5437624A (en) | Phase calibration system of facsimile equipment | |
JPS5758484A (en) | Digital transmission system | |
JPS53101903A (en) | Signal transmitter | |
JPS5371546A (en) | Branching system fos broad band signal | |
JPS533367A (en) | Tltrasonic flow meter | |
JPS52131421A (en) | Automatic celaring circuit | |
JPS5423884A (en) | Setting signal transmitter | |
JPS51148336A (en) | Pulse signal communication method and receiver | |
JPS5797225A (en) | Pulse transfer system | |
JPS5413718A (en) | Digital repeating transfer system for tone signal | |
JPS5757093A (en) | Sampling clock pulse generating circuit |