JPS5757304A - Digital control system using reversed function table memory - Google Patents

Digital control system using reversed function table memory

Info

Publication number
JPS5757304A
JPS5757304A JP55133442A JP13344280A JPS5757304A JP S5757304 A JPS5757304 A JP S5757304A JP 55133442 A JP55133442 A JP 55133442A JP 13344280 A JP13344280 A JP 13344280A JP S5757304 A JPS5757304 A JP S5757304A
Authority
JP
Japan
Prior art keywords
output
control system
digital
input
table memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55133442A
Other languages
Japanese (ja)
Other versions
JPS6116081B2 (en
Inventor
Makoto Hirozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dainippon Screen Manufacturing Co Ltd
Original Assignee
Dainippon Screen Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dainippon Screen Manufacturing Co Ltd filed Critical Dainippon Screen Manufacturing Co Ltd
Priority to JP55133442A priority Critical patent/JPS5757304A/en
Priority to US06/218,687 priority patent/US4395752A/en
Priority to KR1019800005010A priority patent/KR830002733B1/en
Priority to IL61821A priority patent/IL61821A/en
Priority to FR8100176A priority patent/FR2473193A1/en
Priority to DE19813100208 priority patent/DE3100208A1/en
Priority to GB8100377A priority patent/GB2069179B/en
Publication of JPS5757304A publication Critical patent/JPS5757304A/en
Publication of JPS6116081B2 publication Critical patent/JPS6116081B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B11/00—Automatic controllers
    • G05B11/01—Automatic controllers electric
    • G05B11/36—Automatic controllers electric with provision for obtaining particular characteristics, e.g. proportional, integral, differential

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Feedback Control In General (AREA)

Abstract

PURPOSE:To realize an optional characteristics for both the input and output of the entire control system, by installing a table memory that functions as an optional function at the input side of the control system. CONSTITUTION:Sectors 1 and 3 selects a contact A during the control mode, and accordingly a digital input (w) to be applied to a control system in delivered as an output g(w) of an RAM8 which set an optional function. With this output g(w), the address of an RAM2 is obtained and this data is delivered as (x). The data (x) is given to a controlled system 5 of digital outut 5 through a D/A converter 4 and in the form of an analog output X to produce an output Y. This output Y is turned into a digital output y=g(w) through an A/D converter 6. Accordingly the digital input (w) to the control system and the digital output of the controlled system 5 has a desired optional characteristics by the RAM8 that functions as an optional function. In such way, the optional characteristics can be obtained for both the input and output of the entire control system.
JP55133442A 1980-01-08 1980-09-24 Digital control system using reversed function table memory Granted JPS5757304A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP55133442A JPS5757304A (en) 1980-09-24 1980-09-24 Digital control system using reversed function table memory
US06/218,687 US4395752A (en) 1980-01-08 1980-12-22 Digital control process with inverse function table memory
KR1019800005010A KR830002733B1 (en) 1980-09-24 1980-12-29 Digital Control Process
IL61821A IL61821A (en) 1980-01-08 1980-12-30 Digital control process with inverse function table memory
FR8100176A FR2473193A1 (en) 1980-01-08 1981-01-07 DIGITAL CONTROL METHOD USING INVERSE FUNCTION TABLE MEMORY
DE19813100208 DE3100208A1 (en) 1980-01-08 1981-01-07 DIGITAL CONTROL PROCEDURE WITH REVERSE FUNCTIONAL PANEL STORAGE
GB8100377A GB2069179B (en) 1980-01-08 1981-01-07 Digital control process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55133442A JPS5757304A (en) 1980-09-24 1980-09-24 Digital control system using reversed function table memory

Publications (2)

Publication Number Publication Date
JPS5757304A true JPS5757304A (en) 1982-04-06
JPS6116081B2 JPS6116081B2 (en) 1986-04-28

Family

ID=15104863

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55133442A Granted JPS5757304A (en) 1980-01-08 1980-09-24 Digital control system using reversed function table memory

Country Status (2)

Country Link
JP (1) JPS5757304A (en)
KR (1) KR830002733B1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61248103A (en) * 1985-04-26 1986-11-05 Sumitomo Heavy Ind Ltd Controlling circuit for non-linear compensation
JPH0383201U (en) * 1989-12-11 1991-08-23

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61248103A (en) * 1985-04-26 1986-11-05 Sumitomo Heavy Ind Ltd Controlling circuit for non-linear compensation
JPH0383201U (en) * 1989-12-11 1991-08-23

Also Published As

Publication number Publication date
JPS6116081B2 (en) 1986-04-28
KR830002733B1 (en) 1983-12-09

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