JPS5750320A - Sound recording circuit of tape recorder - Google Patents
Sound recording circuit of tape recorderInfo
- Publication number
- JPS5750320A JPS5750320A JP12758680A JP12758680A JPS5750320A JP S5750320 A JPS5750320 A JP S5750320A JP 12758680 A JP12758680 A JP 12758680A JP 12758680 A JP12758680 A JP 12758680A JP S5750320 A JPS5750320 A JP S5750320A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- held
- controlled
- holding circuit
- holding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
- G11B5/02—Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
- G11B5/027—Analogue recording
- G11B5/035—Equalising
Abstract
PURPOSE:To record sound always under an optimum state, by holding a reproduced signal at the same time as the recording signal, which is held in the first integral holding circuit, in the second integral holding circuit. CONSTITUTION:A recording signal is not only applied to a recording head 3 but also has a part held in an integral holding circuit 15 controlled by an astable multivibrator 24. Meanwhile, the reproduced signal from a reproducing head 4 is held in an integral holding circuit 17. This holding time is controlled by a signal obtained by frequency-dividing 25 the signal of a control circuit 26 but is controlled with a prescribed delay time. Consequently, the reproduced signal at the same time as the held recording signal is held in the holding circuit 17. Signals of both holding circuits are compared 19 with each other, and a variable characteristic amplifier 8 is controlled by the comparison result to perform compensation. Since the signal of the control circuit changes in accordance with the running speed of a tape 1, the delay time changes in accordance with this change. Thus, even if the tape running speed is changed, sound is always recorded under an optimum state.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12758680A JPS5750320A (en) | 1980-09-11 | 1980-09-11 | Sound recording circuit of tape recorder |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12758680A JPS5750320A (en) | 1980-09-11 | 1980-09-11 | Sound recording circuit of tape recorder |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5750320A true JPS5750320A (en) | 1982-03-24 |
JPS623485B2 JPS623485B2 (en) | 1987-01-26 |
Family
ID=14963724
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12758680A Granted JPS5750320A (en) | 1980-09-11 | 1980-09-11 | Sound recording circuit of tape recorder |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5750320A (en) |
-
1980
- 1980-09-11 JP JP12758680A patent/JPS5750320A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS623485B2 (en) | 1987-01-26 |
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