JPS5746689A - Speed controller - Google Patents

Speed controller

Info

Publication number
JPS5746689A
JPS5746689A JP55123156A JP12315680A JPS5746689A JP S5746689 A JPS5746689 A JP S5746689A JP 55123156 A JP55123156 A JP 55123156A JP 12315680 A JP12315680 A JP 12315680A JP S5746689 A JPS5746689 A JP S5746689A
Authority
JP
Japan
Prior art keywords
constitution
contents
memory
fed back
clock pulses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55123156A
Other languages
Japanese (ja)
Other versions
JPS6212583B2 (en
Inventor
Akira Oinuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP55123156A priority Critical patent/JPS5746689A/en
Publication of JPS5746689A publication Critical patent/JPS5746689A/en
Publication of JPS6212583B2 publication Critical patent/JPS6212583B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P23/00—Arrangements or methods for the control of AC motors characterised by a control method other than vector control
    • H02P23/22—Controlling the speed digitally using a reference oscillator, a speed proportional pulse rate feedback and a digital comparator

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rotational Drive Of Disk (AREA)
  • Control Of Electric Motors In General (AREA)

Abstract

PURPOSE:To simplify the constitution, by a method wherein an error signal is detected from a time axis correcting circuit provided in order to remove jitter and fed back to a motor for driving a recording medium. CONSTITUTION:The addresses set by a write address counter 12 which counts extracted clock pulses 11 extracted by a demodulator 4, and NRZ parallel data signals are applied to a memory 14 as write addresses and data respectively. The content of the memory 14 reads out the contents at the addresses set by a readout address counter 16 which counts reference clock pulses 15 from a reference oscillator 21. As parallel data 17, said contents are sent to an error correcting circuit 6, with jetter included in the input data signals being removed. In addition, the difference between the write address and the readout address is obtained as an analog error signal 20 by means of a subtracter 18 and a D/A converter 19 and fed back to a turntable driving motor 10.
JP55123156A 1980-09-04 1980-09-04 Speed controller Granted JPS5746689A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55123156A JPS5746689A (en) 1980-09-04 1980-09-04 Speed controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55123156A JPS5746689A (en) 1980-09-04 1980-09-04 Speed controller

Publications (2)

Publication Number Publication Date
JPS5746689A true JPS5746689A (en) 1982-03-17
JPS6212583B2 JPS6212583B2 (en) 1987-03-19

Family

ID=14853559

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55123156A Granted JPS5746689A (en) 1980-09-04 1980-09-04 Speed controller

Country Status (1)

Country Link
JP (1) JPS5746689A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59169378A (en) * 1983-03-16 1984-09-25 Oriental Motor Kk Speed controller of motor
JPS61202195U (en) * 1985-06-07 1986-12-18
JPH09161395A (en) * 1995-12-11 1997-06-20 Nec Corp Optical information reproducing device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5252603A (en) * 1975-10-24 1977-04-27 Sony Corp Reproduction appartus
JPS52128103A (en) * 1976-04-19 1977-10-27 Sanyo Electric Co Ltd Rotary phase control circuit in video signal reproducing unit
JPS53103301A (en) * 1977-02-22 1978-09-08 Sony Corp Automatic positioning device
JPS5497404A (en) * 1978-01-18 1979-08-01 Sharp Corp Buffer memory device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5252603A (en) * 1975-10-24 1977-04-27 Sony Corp Reproduction appartus
JPS52128103A (en) * 1976-04-19 1977-10-27 Sanyo Electric Co Ltd Rotary phase control circuit in video signal reproducing unit
JPS53103301A (en) * 1977-02-22 1978-09-08 Sony Corp Automatic positioning device
JPS5497404A (en) * 1978-01-18 1979-08-01 Sharp Corp Buffer memory device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59169378A (en) * 1983-03-16 1984-09-25 Oriental Motor Kk Speed controller of motor
JPS61202195U (en) * 1985-06-07 1986-12-18
JPH09161395A (en) * 1995-12-11 1997-06-20 Nec Corp Optical information reproducing device

Also Published As

Publication number Publication date
JPS6212583B2 (en) 1987-03-19

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