JPS5742294A - Time division channel controller - Google Patents
Time division channel controllerInfo
- Publication number
- JPS5742294A JPS5742294A JP11801680A JP11801680A JPS5742294A JP S5742294 A JPS5742294 A JP S5742294A JP 11801680 A JP11801680 A JP 11801680A JP 11801680 A JP11801680 A JP 11801680A JP S5742294 A JPS5742294 A JP S5742294A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- time
- time division
- switch
- parties
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/42—Systems providing special services or facilities to subscribers
- H04M3/56—Arrangements for connecting several subscribers to a common circuit, i.e. affording conference facilities
- H04M3/568—Arrangements for connecting several subscribers to a common circuit, i.e. affording conference facilities audio processing specific to telephonic conferencing, e.g. spatial distribution, mixing of participants
- H04M3/569—Arrangements for connecting several subscribers to a common circuit, i.e. affording conference facilities audio processing specific to telephonic conferencing, e.g. spatial distribution, mixing of participants using the instant speaker's algorithm
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Abstract
PURPOSE:To make unnecessary the PCM highway exclusive for three parties' connection and to reduce the delay in the three parties' connection time, by providing a time division channel device and controller having a time control circuit making time control. CONSTITUTION:A multiplex circuit 5 is connected to a subscriber interface circuit 4 consisting of an A/D conversion circuit, and this circuit 5 is connected with a time division switch control circuit 8 which inputs the information designating the close/ open of the time division channel via a time division switch 6 and the information indicating the position of calls for two subscribers' share in time division phase conversion corresponding to the call for one subscriber's share of the input data of the switch 6. The two subscribers' share call data outputted from the switch 6 is stored in a data register circuit 9 with the control of the circuit 8, and the two outputs of the circuit 9 is compared with a comparison circuit 10. As the result of comparison, the data having higher digital value is outputted from a selection circuit 11. The time of each circuit is controlled with a time control circuit 13 to reduce the delay in three parties' connection time.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11801680A JPS5742294A (en) | 1980-08-26 | 1980-08-26 | Time division channel controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11801680A JPS5742294A (en) | 1980-08-26 | 1980-08-26 | Time division channel controller |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5742294A true JPS5742294A (en) | 1982-03-09 |
Family
ID=14725966
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11801680A Pending JPS5742294A (en) | 1980-08-26 | 1980-08-26 | Time division channel controller |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5742294A (en) |
-
1980
- 1980-08-26 JP JP11801680A patent/JPS5742294A/en active Pending
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