JPS5741725A - Logical circuit system - Google Patents

Logical circuit system

Info

Publication number
JPS5741725A
JPS5741725A JP55119602A JP11960280A JPS5741725A JP S5741725 A JPS5741725 A JP S5741725A JP 55119602 A JP55119602 A JP 55119602A JP 11960280 A JP11960280 A JP 11960280A JP S5741725 A JPS5741725 A JP S5741725A
Authority
JP
Japan
Prior art keywords
signal
logical circuit
circuit system
buses
turned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55119602A
Other languages
Japanese (ja)
Inventor
Kunihiro Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55119602A priority Critical patent/JPS5741725A/en
Priority to DE19813132470 priority patent/DE3132470A1/en
Publication of JPS5741725A publication Critical patent/JPS5741725A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1731—Optimisation thereof
    • H03K19/1732—Optimisation thereof by limitation or reduction of the pin/gate ratio
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017545—Coupling arrangements; Impedance matching circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE: To realize the signal transfer between the systems while the independent transmission of signal is preserved within each logical circuit system, by installing a signal mutual transfer device between buses.
CONSTITUTION: Logical circuit systems are independent of each other when a signal mutual transfer device 7 that connects buses 1 and 2 when necessary is turned off. When the device 7 is turned on, the buses 1 and 2 are put into a body. Thus the signal transfer becomes possible for an optional combination of all function blocks 3W6.
COPYRIGHT: (C)1982,JPO&Japio
JP55119602A 1980-08-26 1980-08-26 Logical circuit system Pending JPS5741725A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP55119602A JPS5741725A (en) 1980-08-26 1980-08-26 Logical circuit system
DE19813132470 DE3132470A1 (en) 1980-08-26 1981-08-17 Logic circuit system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55119602A JPS5741725A (en) 1980-08-26 1980-08-26 Logical circuit system

Publications (1)

Publication Number Publication Date
JPS5741725A true JPS5741725A (en) 1982-03-09

Family

ID=14765450

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55119602A Pending JPS5741725A (en) 1980-08-26 1980-08-26 Logical circuit system

Country Status (2)

Country Link
JP (1) JPS5741725A (en)
DE (1) DE3132470A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60102800A (en) * 1983-10-24 1985-06-06 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Method of producing thermal conductive assembly
US6374988B1 (en) 2000-02-02 2002-04-23 Fairfield Machine Company, Inc. Accumulating conveyor for elongated stock

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60102800A (en) * 1983-10-24 1985-06-06 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Method of producing thermal conductive assembly
JPH0449800B2 (en) * 1983-10-24 1992-08-12 Intaanashonaru Bijinesu Mashiinzu Corp
US6374988B1 (en) 2000-02-02 2002-04-23 Fairfield Machine Company, Inc. Accumulating conveyor for elongated stock

Also Published As

Publication number Publication date
DE3132470A1 (en) 1982-07-01

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