JPS5731055A - Program control system - Google Patents

Program control system

Info

Publication number
JPS5731055A
JPS5731055A JP10498980A JP10498980A JPS5731055A JP S5731055 A JPS5731055 A JP S5731055A JP 10498980 A JP10498980 A JP 10498980A JP 10498980 A JP10498980 A JP 10498980A JP S5731055 A JPS5731055 A JP S5731055A
Authority
JP
Japan
Prior art keywords
gate
interruption
mode
swi
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10498980A
Other languages
Japanese (ja)
Other versions
JPS6223896B2 (en
Inventor
Hideo Nakamura
Masaru Shibukawa
Toshimasa Kihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10498980A priority Critical patent/JPS5731055A/en
Publication of JPS5731055A publication Critical patent/JPS5731055A/en
Publication of JPS6223896B2 publication Critical patent/JPS6223896B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked

Abstract

PURPOSE:To simplify an auxiliary program such as diagnosis of a fault, etc., by providing in advance at least two interruption addresses on an interruption address generation device, and selecting a program jump destination by a mode designating signal from the outside. CONSTITUTION:A mode signal MODE is inputted to one 2 input AND gate 14, and an inverted signal by an inverter 13 is inputted to the other 2 input AND gate 15. To the other input terminal of these gates 14, 15 is inputted a software interruption request SWI, and an output of the gate 14 and an output of the gate 15 control an AND gate 16 and an AND gate 17, respectively. In this case, when the interruption SWI has been generated by a mode ''1'' from the outside, a jump destination address in an address memory 20 is outputted through the gate 16, and when the interruption SWI has been generated by a mode ''0'', a jump destination address in an address memory 21 is outputted through the AND gate 17.
JP10498980A 1980-08-01 1980-08-01 Program control system Granted JPS5731055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10498980A JPS5731055A (en) 1980-08-01 1980-08-01 Program control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10498980A JPS5731055A (en) 1980-08-01 1980-08-01 Program control system

Publications (2)

Publication Number Publication Date
JPS5731055A true JPS5731055A (en) 1982-02-19
JPS6223896B2 JPS6223896B2 (en) 1987-05-26

Family

ID=14395497

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10498980A Granted JPS5731055A (en) 1980-08-01 1980-08-01 Program control system

Country Status (1)

Country Link
JP (1) JPS5731055A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS638841A (en) * 1986-06-27 1988-01-14 Nec Corp Interruption accepting system
JPH0335326A (en) * 1989-06-30 1991-02-15 Mitsubishi Electric Corp Microprocessor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4929944A (en) * 1972-07-20 1974-03-16
JPS5595149A (en) * 1979-01-12 1980-07-19 Toshiba Corp Microprogram system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4929944A (en) * 1972-07-20 1974-03-16
JPS5595149A (en) * 1979-01-12 1980-07-19 Toshiba Corp Microprogram system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS638841A (en) * 1986-06-27 1988-01-14 Nec Corp Interruption accepting system
JPH0335326A (en) * 1989-06-30 1991-02-15 Mitsubishi Electric Corp Microprocessor

Also Published As

Publication number Publication date
JPS6223896B2 (en) 1987-05-26

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