JPS5726200A - Plating device for printed wiring substrate - Google Patents

Plating device for printed wiring substrate

Info

Publication number
JPS5726200A
JPS5726200A JP9878980A JP9878980A JPS5726200A JP S5726200 A JPS5726200 A JP S5726200A JP 9878980 A JP9878980 A JP 9878980A JP 9878980 A JP9878980 A JP 9878980A JP S5726200 A JPS5726200 A JP S5726200A
Authority
JP
Japan
Prior art keywords
substrate
plating
frame
frames
cells
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9878980A
Other languages
Japanese (ja)
Inventor
Satoshi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyo Giken Kogyo KK
Original Assignee
Toyo Giken Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyo Giken Kogyo KK filed Critical Toyo Giken Kogyo KK
Priority to JP9878980A priority Critical patent/JPS5726200A/en
Publication of JPS5726200A publication Critical patent/JPS5726200A/en
Pending legal-status Critical Current

Links

Landscapes

  • Manufacturing Of Printed Wiring (AREA)

Abstract

PURPOSE: To perform plating automatically at prescribed current density, time and high performance by supplying electric power to every substrate conveying frame with frame number display pins immersed in plating cells from separate power sources and inputtng only the respective substrate surface areas to an area setter.
CONSTITUTION: In case when a number detector 3 is mounted to a substrate stocker 7, a conveying frame 1 is stopped before a frame number display pin 2 abuts on a detecting pin 3' and the operator mounts a substrate 9 to this. The detector 3 detects the intrinsic number of that frame and stores the same in a control device 5. The operator sets the square meter (m2) number of the substrate with an area setter 4, stores the same in the device 5, and checks with the setter 4. He performs this operation successively and holds a large number of the frames 9 to the sotcker 7. Thence, the frames 1 are treated in respective pretreatment cells A, and are immersed in any of plating cells B; at the same time, the device 5 sets power sources D at the electric current values conforming to the square meter numbers of said frames 9, whereby plating is accomplished.
COPYRIGHT: (C)1982,JPO&Japio
JP9878980A 1980-07-21 1980-07-21 Plating device for printed wiring substrate Pending JPS5726200A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9878980A JPS5726200A (en) 1980-07-21 1980-07-21 Plating device for printed wiring substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9878980A JPS5726200A (en) 1980-07-21 1980-07-21 Plating device for printed wiring substrate

Publications (1)

Publication Number Publication Date
JPS5726200A true JPS5726200A (en) 1982-02-12

Family

ID=14229129

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9878980A Pending JPS5726200A (en) 1980-07-21 1980-07-21 Plating device for printed wiring substrate

Country Status (1)

Country Link
JP (1) JPS5726200A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61275909A (en) * 1985-05-30 1986-12-06 Nosaka Denki Seisakusho:Kk Work schedule generating method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61275909A (en) * 1985-05-30 1986-12-06 Nosaka Denki Seisakusho:Kk Work schedule generating method

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