JPS5724126A - C-mos input buffer compatible with ttl - Google Patents

C-mos input buffer compatible with ttl

Info

Publication number
JPS5724126A
JPS5724126A JP8067481A JP8067481A JPS5724126A JP S5724126 A JPS5724126 A JP S5724126A JP 8067481 A JP8067481 A JP 8067481A JP 8067481 A JP8067481 A JP 8067481A JP S5724126 A JPS5724126 A JP S5724126A
Authority
JP
Japan
Prior art keywords
ttl
input buffer
mos input
buffer compatible
compatible
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8067481A
Other languages
Japanese (ja)
Inventor
Emu Maadoka Maikuru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xerox Corp
Original Assignee
Xerox Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xerox Corp filed Critical Xerox Corp
Publication of JPS5724126A publication Critical patent/JPS5724126A/en
Pending legal-status Critical Current

Links

Landscapes

  • Logic Circuits (AREA)
JP8067481A 1980-06-02 1981-05-27 C-mos input buffer compatible with ttl Pending JPS5724126A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US15572180A 1980-06-02 1980-06-02

Publications (1)

Publication Number Publication Date
JPS5724126A true JPS5724126A (en) 1982-02-08

Family

ID=22556536

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8067481A Pending JPS5724126A (en) 1980-06-02 1981-05-27 C-mos input buffer compatible with ttl

Country Status (1)

Country Link
JP (1) JPS5724126A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59127858A (en) * 1983-01-13 1984-07-23 Seiko Epson Corp Integrated circuit
JPS605621A (en) * 1983-06-24 1985-01-12 Hitachi Ltd Asynchronous signal synchronizing circuit
JPS60142618A (en) * 1983-12-28 1985-07-27 Hitachi Ltd Input buffer circuit
JPH02194729A (en) * 1989-01-23 1990-08-01 Hitachi Ltd Logic circuit
JPH03132211A (en) * 1989-09-12 1991-06-05 Samsung Semiconductor Inc Ttl/cmos level converter
JPH0767069B2 (en) * 1984-02-15 1995-07-19 アメリカン テレフォン アンド テレグラフ カムパニー Integrated circuit device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59127858A (en) * 1983-01-13 1984-07-23 Seiko Epson Corp Integrated circuit
JPS605621A (en) * 1983-06-24 1985-01-12 Hitachi Ltd Asynchronous signal synchronizing circuit
JPS60142618A (en) * 1983-12-28 1985-07-27 Hitachi Ltd Input buffer circuit
JPH0767069B2 (en) * 1984-02-15 1995-07-19 アメリカン テレフォン アンド テレグラフ カムパニー Integrated circuit device
JPH02194729A (en) * 1989-01-23 1990-08-01 Hitachi Ltd Logic circuit
JPH03132211A (en) * 1989-09-12 1991-06-05 Samsung Semiconductor Inc Ttl/cmos level converter

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