JPS5721794B2 - - Google Patents

Info

Publication number
JPS5721794B2
JPS5721794B2 JP479274A JP479274A JPS5721794B2 JP S5721794 B2 JPS5721794 B2 JP S5721794B2 JP 479274 A JP479274 A JP 479274A JP 479274 A JP479274 A JP 479274A JP S5721794 B2 JPS5721794 B2 JP S5721794B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP479274A
Other languages
Japanese (ja)
Other versions
JPS4999440A (en:Method
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS4999440A publication Critical patent/JPS4999440A/ja
Publication of JPS5721794B2 publication Critical patent/JPS5721794B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/1506Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages
    • H03K5/15066Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages using bistable devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037Bistable circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Logic Circuits (AREA)
  • Dram (AREA)
  • Electronic Switches (AREA)
JP479274A 1972-12-29 1973-12-24 Expired JPS5721794B2 (en:Method)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2264135A DE2264135C3 (de) 1972-12-29 1972-12-29 Speichereinrichtung mit mehreren bistabilen Kippstufen

Publications (2)

Publication Number Publication Date
JPS4999440A JPS4999440A (en:Method) 1974-09-19
JPS5721794B2 true JPS5721794B2 (en:Method) 1982-05-10

Family

ID=5865783

Family Applications (1)

Application Number Title Priority Date Filing Date
JP479274A Expired JPS5721794B2 (en:Method) 1972-12-29 1973-12-24

Country Status (13)

Country Link
US (1) US3914627A (en:Method)
JP (1) JPS5721794B2 (en:Method)
AT (1) AT334663B (en:Method)
BE (1) BE809237A (en:Method)
CA (1) CA1005528A (en:Method)
CH (1) CH563054A5 (en:Method)
DE (1) DE2264135C3 (en:Method)
FR (1) FR2212605B1 (en:Method)
GB (1) GB1453040A (en:Method)
IN (1) IN138818B (en:Method)
IT (1) IT1000753B (en:Method)
NL (1) NL175113C (en:Method)
SE (1) SE398934B (en:Method)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4286330A (en) * 1976-04-07 1981-08-25 Isaacson Joel D Autonomic string-manipulation system

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3474262A (en) * 1966-03-30 1969-10-21 Sperry Rand Corp N-state control circuit
US3662193A (en) * 1971-05-24 1972-05-09 Itt Tri-stable circuit
US3808544A (en) * 1972-03-28 1974-04-30 Nat Res Dev Sequential machines

Also Published As

Publication number Publication date
IN138818B (en:Method) 1976-04-03
IT1000753B (it) 1976-04-10
SE398934B (sv) 1978-01-23
AT334663B (de) 1976-01-25
NL175113B (nl) 1984-04-16
DE2264135B2 (de) 1979-02-08
NL7316449A (en:Method) 1974-07-02
CH563054A5 (en:Method) 1975-06-13
US3914627A (en) 1975-10-21
NL175113C (nl) 1984-09-17
DE2264135C3 (de) 1979-09-27
BE809237A (fr) 1974-04-16
DE2264135A1 (de) 1974-07-11
FR2212605B1 (en:Method) 1976-11-19
CA1005528A (en) 1977-02-15
FR2212605A1 (en:Method) 1974-07-26
GB1453040A (en) 1976-10-20
ATA1001173A (de) 1976-05-15
JPS4999440A (en:Method) 1974-09-19

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