JPS5720982A - Computer system - Google Patents

Computer system

Info

Publication number
JPS5720982A
JPS5720982A JP9523680A JP9523680A JPS5720982A JP S5720982 A JPS5720982 A JP S5720982A JP 9523680 A JP9523680 A JP 9523680A JP 9523680 A JP9523680 A JP 9523680A JP S5720982 A JPS5720982 A JP S5720982A
Authority
JP
Japan
Prior art keywords
discriminator
bit
storage system
normal computer
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9523680A
Other languages
Japanese (ja)
Other versions
JPS5953633B2 (en
Inventor
Tsutomu Tanaka
Masaaki Inao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55095236A priority Critical patent/JPS5953633B2/en
Publication of JPS5720982A publication Critical patent/JPS5720982A/en
Publication of JPS5953633B2 publication Critical patent/JPS5953633B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation

Abstract

PURPOSE:To decrease the frequency of the purging of a conversion index buffer in the normal computer mode of a multiple virtual storage system, by expanding the bit width of a space discriminator by utilizing a disused virtual computer distriminator for a normal computer system. CONSTITUTION:In normal computer mode of a multiple virtual storage system, only a control register 12 is made effective and an extended control register 13 is made ineffective to modify the algorithm of the hush circuit of a discriminator generating circuit 14. Consequently, an (n)-bit virtual computer discriminator VM-ID stored in an output register 15 together with an (m)-bit space discriminator ID-O in virtual computer mode of the multiple virtual storage system is not generated. Using the (n)-bit part of this disused discriminator VM-ID extends the bit width of the space discriminator ID and the frequency of conversion index buffer (TUB) purging for the normal computer system is decreased.
JP55095236A 1980-07-12 1980-07-12 computer system Expired JPS5953633B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55095236A JPS5953633B2 (en) 1980-07-12 1980-07-12 computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55095236A JPS5953633B2 (en) 1980-07-12 1980-07-12 computer system

Publications (2)

Publication Number Publication Date
JPS5720982A true JPS5720982A (en) 1982-02-03
JPS5953633B2 JPS5953633B2 (en) 1984-12-26

Family

ID=14132119

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55095236A Expired JPS5953633B2 (en) 1980-07-12 1980-07-12 computer system

Country Status (1)

Country Link
JP (1) JPS5953633B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60209862A (en) * 1984-02-29 1985-10-22 Panafacom Ltd Address conversion control system
US5761738A (en) * 1993-04-08 1998-06-02 International Business Machines Corporation Computer system which stores management or control information in different address space but same offset as corresponding data

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60209862A (en) * 1984-02-29 1985-10-22 Panafacom Ltd Address conversion control system
US5761738A (en) * 1993-04-08 1998-06-02 International Business Machines Corporation Computer system which stores management or control information in different address space but same offset as corresponding data

Also Published As

Publication number Publication date
JPS5953633B2 (en) 1984-12-26

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