JPS57204669A - Duplication switching control system - Google Patents
Duplication switching control systemInfo
- Publication number
- JPS57204669A JPS57204669A JP8927981A JP8927981A JPS57204669A JP S57204669 A JPS57204669 A JP S57204669A JP 8927981 A JP8927981 A JP 8927981A JP 8927981 A JP8927981 A JP 8927981A JP S57204669 A JPS57204669 A JP S57204669A
- Authority
- JP
- Japan
- Prior art keywords
- ccu0
- circuit control
- ccu1
- ciu
- flop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/22—Arrangements for supervision, monitoring or testing
- H04M3/24—Arrangements for supervision, monitoring or testing with provision for checking the normal operation
- H04M3/241—Arrangements for supervision, monitoring or testing with provision for checking the normal operation for stored program controlled exchanges
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Monitoring And Testing Of Exchanges (AREA)
Abstract
PURPOSE:To prevent malfunction of a route flip-flop even when an error occurs due to accidental factor by repeating continuously a special fixed pattern in signals that control duplication switching. CONSTITUTION:CCU0 and CCU2 are duplicated circuit control devices and CIU is an interface device of many circuits. Circuit control devices CCU0, CCU1 contain all circuits and the interface device CIU contains a specified number of circuits. S route flip-flop that selects circuit control device CCU0 or CCU1 is provided in each circuit interface CIU. The route for one of control device is established by decoding special signals of fixed pattern sent continuously from circuit control device CCU0, CCU1, and setting or resetting the route flip-flop.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8927981A JPS57204669A (en) | 1981-06-10 | 1981-06-10 | Duplication switching control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8927981A JPS57204669A (en) | 1981-06-10 | 1981-06-10 | Duplication switching control system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57204669A true JPS57204669A (en) | 1982-12-15 |
JPH0381342B2 JPH0381342B2 (en) | 1991-12-27 |
Family
ID=13966274
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8927981A Granted JPS57204669A (en) | 1981-06-10 | 1981-06-10 | Duplication switching control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57204669A (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4998505A (en) * | 1973-01-22 | 1974-09-18 | ||
JPS53135210A (en) * | 1977-04-30 | 1978-11-25 | Nec Corp | Data-channel switching system of asynchronous processing system |
JPS5643895A (en) * | 1979-09-17 | 1981-04-22 | Nec Corp | Signal selection system |
-
1981
- 1981-06-10 JP JP8927981A patent/JPS57204669A/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4998505A (en) * | 1973-01-22 | 1974-09-18 | ||
JPS53135210A (en) * | 1977-04-30 | 1978-11-25 | Nec Corp | Data-channel switching system of asynchronous processing system |
JPS5643895A (en) * | 1979-09-17 | 1981-04-22 | Nec Corp | Signal selection system |
Also Published As
Publication number | Publication date |
---|---|
JPH0381342B2 (en) | 1991-12-27 |
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