JPS57201944A - Fault detector - Google Patents

Fault detector

Info

Publication number
JPS57201944A
JPS57201944A JP8595681A JP8595681A JPS57201944A JP S57201944 A JPS57201944 A JP S57201944A JP 8595681 A JP8595681 A JP 8595681A JP 8595681 A JP8595681 A JP 8595681A JP S57201944 A JPS57201944 A JP S57201944A
Authority
JP
Japan
Prior art keywords
fault
detection
mode
circuit
converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8595681A
Other languages
Japanese (ja)
Inventor
Susumu Yamakawa
Hideo Osawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8595681A priority Critical patent/JPS57201944A/en
Publication of JPS57201944A publication Critical patent/JPS57201944A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Testing And Monitoring For Control Systems (AREA)

Abstract

PURPOSE:To rapidly find a fault position in a signal processing circuit without using any special meauring instrument, by comparing signals from plural preset detection positions with a fault detection level. CONSTITUTION:When the mode switch 3 on a console panel 2 is set to (mode 1), a control circuit 5 generates a control signal necessary for fault detection. The detection signal from a circuit whose fault is to be detected is inputted through an analog multiplexer 8 and an A/D converter 9 to a comparator 11, where it is compared with a fault detection level. If a fault is detected, an address value is latched in a latch circuit 16 and a fault code showing the fault position is displayed on a display device 17. Then when the mode switch 3 is set to (mode 2), the latch circuit 16 latches the output of the A/D converter 9 and the voltage value at the detection position is displayed on the display device 17.
JP8595681A 1981-06-04 1981-06-04 Fault detector Pending JPS57201944A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8595681A JPS57201944A (en) 1981-06-04 1981-06-04 Fault detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8595681A JPS57201944A (en) 1981-06-04 1981-06-04 Fault detector

Publications (1)

Publication Number Publication Date
JPS57201944A true JPS57201944A (en) 1982-12-10

Family

ID=13873193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8595681A Pending JPS57201944A (en) 1981-06-04 1981-06-04 Fault detector

Country Status (1)

Country Link
JP (1) JPS57201944A (en)

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