JPS57197933A - Setting circuit for frequency division ratio - Google Patents
Setting circuit for frequency division ratioInfo
- Publication number
- JPS57197933A JPS57197933A JP56082721A JP8272181A JPS57197933A JP S57197933 A JPS57197933 A JP S57197933A JP 56082721 A JP56082721 A JP 56082721A JP 8272181 A JP8272181 A JP 8272181A JP S57197933 A JPS57197933 A JP S57197933A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- counter
- frequency division
- division ratio
- encoder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
- H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
Landscapes
- Transmission And Conversion Of Sensor Element Output (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
PURPOSE:To vary a frequency division ratio greatly and rapidly by inputting an up signal and a down signal selectively to adequate stages of an up-down counter according to the rotational speed of a rotary encoder. CONSTITUTION:When a rotary encoder 18 rotates, an up signal S1 or a down signal S2 is outputted from a clock generator 19 to a counter control circuit 23 according to the rotation direction of the encoder. The control circuit 23 consists of gate circuuts 23a-23d provided corresponding to the respective stages 21a-21d of an up-down counter 21. On the other hand, the clock generator 19 outputs pulses P3 proportional to the rotational frequency to a clock counter 22 without reference to the rotation direction of the encoder 18, and then a control signal Cs varying according to the rotational speed is supplied to one of gate circuits 23a-23d, which is opened, thereby applying the up signal S1 or down signal S2 to the corresponding stage of the up-down counter 21.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56082721A JPS57197933A (en) | 1981-05-31 | 1981-05-31 | Setting circuit for frequency division ratio |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56082721A JPS57197933A (en) | 1981-05-31 | 1981-05-31 | Setting circuit for frequency division ratio |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57197933A true JPS57197933A (en) | 1982-12-04 |
JPS6312403B2 JPS6312403B2 (en) | 1988-03-18 |
Family
ID=13782267
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56082721A Granted JPS57197933A (en) | 1981-05-31 | 1981-05-31 | Setting circuit for frequency division ratio |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57197933A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63193613A (en) * | 1987-02-04 | 1988-08-10 | Aikomu Kk | Digital switch mechanism |
JPS63125429U (en) * | 1987-02-06 | 1988-08-16 | ||
JPS63296413A (en) * | 1987-05-27 | 1988-12-02 | Aikomu Kk | Offsettable digital switch |
JPH04240922A (en) * | 1991-01-25 | 1992-08-28 | Fujitsu Denso Ltd | Output value setting device |
-
1981
- 1981-05-31 JP JP56082721A patent/JPS57197933A/en active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63193613A (en) * | 1987-02-04 | 1988-08-10 | Aikomu Kk | Digital switch mechanism |
JPS63125429U (en) * | 1987-02-06 | 1988-08-16 | ||
JPS63296413A (en) * | 1987-05-27 | 1988-12-02 | Aikomu Kk | Offsettable digital switch |
JPH04240922A (en) * | 1991-01-25 | 1992-08-28 | Fujitsu Denso Ltd | Output value setting device |
Also Published As
Publication number | Publication date |
---|---|
JPS6312403B2 (en) | 1988-03-18 |
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