JPS57192186A - Picture display device - Google Patents

Picture display device

Info

Publication number
JPS57192186A
JPS57192186A JP56076937A JP7693781A JPS57192186A JP S57192186 A JPS57192186 A JP S57192186A JP 56076937 A JP56076937 A JP 56076937A JP 7693781 A JP7693781 A JP 7693781A JP S57192186 A JPS57192186 A JP S57192186A
Authority
JP
Japan
Prior art keywords
outputted
signal
output
terminal
graph
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56076937A
Other languages
Japanese (ja)
Inventor
Makoto Kono
Zenji Hattori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP56076937A priority Critical patent/JPS57192186A/en
Publication of JPS57192186A publication Critical patent/JPS57192186A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make display as if an analogous graph wave moved, by blanking a still picture with a sprescribed timing, providing a arbitrary similar graph at each desired section repetitively and blanking the sections with different timing respectively.
CONSTITUTION: An address corresponding to sections 6a∼6c is outputted from a control circuit 21, applied to a comparison circuit 22 and a signal corresponding to the tri-state address is outputted. The signals are applied to NANDs 23a∼ 23c respectively. On the other hand, a signal from an oscillator 24 is applied to a ternary counter 31, the output is outputted through inverters 32a∼32c, they are synthesized at an AND 33 for logical sum 16. Thus, while the 1st terminal of the counter 31 has an output, a signal A is outputted and when the 2nd terminal has an output, the signal B is outputted and when the 3rd terminal has an output, a signal C is outputted, allowing to move a graph.
COPYRIGHT: (C)1982,JPO&Japio
JP56076937A 1981-05-21 1981-05-21 Picture display device Pending JPS57192186A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56076937A JPS57192186A (en) 1981-05-21 1981-05-21 Picture display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56076937A JPS57192186A (en) 1981-05-21 1981-05-21 Picture display device

Publications (1)

Publication Number Publication Date
JPS57192186A true JPS57192186A (en) 1982-11-26

Family

ID=13619639

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56076937A Pending JPS57192186A (en) 1981-05-21 1981-05-21 Picture display device

Country Status (1)

Country Link
JP (1) JPS57192186A (en)

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