JPS57191731A - Operating system for terminal equipment - Google Patents

Operating system for terminal equipment

Info

Publication number
JPS57191731A
JPS57191731A JP56076956A JP7695681A JPS57191731A JP S57191731 A JPS57191731 A JP S57191731A JP 56076956 A JP56076956 A JP 56076956A JP 7695681 A JP7695681 A JP 7695681A JP S57191731 A JPS57191731 A JP S57191731A
Authority
JP
Japan
Prior art keywords
tasks
level
registered
queue
execution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56076956A
Other languages
Japanese (ja)
Inventor
Hideo Kurokawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56076956A priority Critical patent/JPS57191731A/en
Publication of JPS57191731A publication Critical patent/JPS57191731A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system

Abstract

PURPOSE:To make the assignment and the revervation of input/output devices efficient, by generating queue structures for every level of respective tasks in accordance with their state and ranking tasks in these queue and changing this ranking. CONSTITUTION:Lower-level tasks 2 and 2' consisting of tasks for interpreting user programs, middle-level tasks 3 and 3' which control input/output devices 5 and 5', and a high-level task 1 which controls the state of these low-level and middle-level tasks are controlled by an operating system OS 4. Respective tasks are registered in an execution queue (E.Q) or ready queue (R.Q) for every level, and ranks of execution waiting tasks which are ranked and registered in the R.Q in the FIFO system are changed by a rank changing means. Commands issued to waiting middle-level tasks are registered in a command execution list, and commands issued to executing or execution waiting middle-tasks are registered in a command start list. Consequently, input/output devices are used efficiently.
JP56076956A 1981-05-21 1981-05-21 Operating system for terminal equipment Pending JPS57191731A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56076956A JPS57191731A (en) 1981-05-21 1981-05-21 Operating system for terminal equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56076956A JPS57191731A (en) 1981-05-21 1981-05-21 Operating system for terminal equipment

Publications (1)

Publication Number Publication Date
JPS57191731A true JPS57191731A (en) 1982-11-25

Family

ID=13620227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56076956A Pending JPS57191731A (en) 1981-05-21 1981-05-21 Operating system for terminal equipment

Country Status (1)

Country Link
JP (1) JPS57191731A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59133650A (en) * 1982-11-26 1984-08-01 インモス，リミテツド Microcomputer, network thereof and operation of same
JPS6074065A (en) * 1983-07-13 1985-04-26 スペリ−・コ−ポレ−シヨン Queue technique during use of control mechanism
JPS61262938A (en) * 1985-03-01 1986-11-20 ウオング・ラボラトリ−ズ・インコ−ポレ−テツド Data processing system having tunable operating system means

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54101635A (en) * 1978-01-09 1979-08-10 Honeywell Inf Systems Queue structure for data processor
JPS5624651A (en) * 1979-08-07 1981-03-09 Nec Corp Multiple task processing unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54101635A (en) * 1978-01-09 1979-08-10 Honeywell Inf Systems Queue structure for data processor
JPS5624651A (en) * 1979-08-07 1981-03-09 Nec Corp Multiple task processing unit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59133650A (en) * 1982-11-26 1984-08-01 インモス，リミテツド Microcomputer, network thereof and operation of same
JPS6074065A (en) * 1983-07-13 1985-04-26 スペリ−・コ−ポレ−シヨン Queue technique during use of control mechanism
JPH0472259B2 (en) * 1983-07-13 1992-11-17 Unisys Corp
JPS61262938A (en) * 1985-03-01 1986-11-20 ウオング・ラボラトリ−ズ・インコ−ポレ−テツド Data processing system having tunable operating system means

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