JPS57186850A - Burst signal detector - Google Patents
Burst signal detectorInfo
- Publication number
- JPS57186850A JPS57186850A JP7256481A JP7256481A JPS57186850A JP S57186850 A JPS57186850 A JP S57186850A JP 7256481 A JP7256481 A JP 7256481A JP 7256481 A JP7256481 A JP 7256481A JP S57186850 A JPS57186850 A JP S57186850A
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- burst
- signal
- burst signal
- outputted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/08—Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Dc Digital Transmission (AREA)
- Radio Relay Systems (AREA)
Abstract
PURPOSE:To execute detection with high reliability even against a burst signal input whose S/N ratio is low, by using confirmation procedures extending over burst of continuous and prescribed number of times, and undetected confirmation procedures extending over prescribed number of times. CONSTITUTION:At the time point when a comparator output 5 is varied to ''1'' from ''0'', a rise pulse signal 32 is generated by a rise detecting circuit 31. By this signal 32, a pulse generator 34 generates a burst position forecasting pulse 35 while an FF 33 is set. To a continuous burst signal detector 37, the pulse 35 and the output 5 are inputted through an AND circuit 36, and when a burst signal has been detected at a forecast position continuously (m1) times, a carry signal 38 is outputted. As a result, an FF 42 is set, a lock-on signal becomes a ''1'' level, and a burst existence position pulse 21 is outputted. On the other hand, when the burst signal has not been detected at the forecast position continuously (n2) times, a non-continuous burst signal detector 40 outputs a carry pulse 41. As a result, the FF 42 is reset, and the pulse 21 is not outputted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7256481A JPS57186850A (en) | 1981-05-12 | 1981-05-12 | Burst signal detector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7256481A JPS57186850A (en) | 1981-05-12 | 1981-05-12 | Burst signal detector |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57186850A true JPS57186850A (en) | 1982-11-17 |
Family
ID=13492980
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7256481A Pending JPS57186850A (en) | 1981-05-12 | 1981-05-12 | Burst signal detector |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57186850A (en) |
-
1981
- 1981-05-12 JP JP7256481A patent/JPS57186850A/en active Pending
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