JPS57185782A - Multiple discrimination circuit for character broadcast signal - Google Patents
Multiple discrimination circuit for character broadcast signalInfo
- Publication number
- JPS57185782A JPS57185782A JP7035381A JP7035381A JPS57185782A JP S57185782 A JPS57185782 A JP S57185782A JP 7035381 A JP7035381 A JP 7035381A JP 7035381 A JP7035381 A JP 7035381A JP S57185782 A JPS57185782 A JP S57185782A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- character
- detection circuit
- broadcast signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Systems (AREA)
Abstract
PURPOSE:To obtain a circuit with increased reliability for discrimination, by detecting a signal in the same frequency component as a signal of a clock run-in part of a character information signal and discriminating if the character broadcast is made. CONSTITUTION:A composite video signal from a video detection circuit 4 is mixed with a character signal from a decoder 6 at a mixer 5 and applied to a cathode ray tube and also to a data slice circuit 11 and a synchronizing separation circuit 12. When a character signal is superimposed in a vertical blandking period, the signal is digitized at the slice circuit 11 and applied to a data input terminal of a shift register 15 through and AND gate 13. A sinusoidal wave AO is outputted only at the gate period with an amplifier 16 tuned to a frequency (about 2.86MHz), and if the clock run-in is presented is discriminated at a detection circuit 34 via a detection circuit 31, a level comparison circuit 32 and an integrating circuit 33.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7035381A JPS57185782A (en) | 1981-05-11 | 1981-05-11 | Multiple discrimination circuit for character broadcast signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7035381A JPS57185782A (en) | 1981-05-11 | 1981-05-11 | Multiple discrimination circuit for character broadcast signal |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57185782A true JPS57185782A (en) | 1982-11-16 |
Family
ID=13428975
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7035381A Pending JPS57185782A (en) | 1981-05-11 | 1981-05-11 | Multiple discrimination circuit for character broadcast signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57185782A (en) |
-
1981
- 1981-05-11 JP JP7035381A patent/JPS57185782A/en active Pending
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