JPS57181285A - Television signal transmission system - Google Patents
Television signal transmission systemInfo
- Publication number
- JPS57181285A JPS57181285A JP6633281A JP6633281A JPS57181285A JP S57181285 A JPS57181285 A JP S57181285A JP 6633281 A JP6633281 A JP 6633281A JP 6633281 A JP6633281 A JP 6633281A JP S57181285 A JPS57181285 A JP S57181285A
- Authority
- JP
- Japan
- Prior art keywords
- band
- contents
- signal
- circuit
- frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/24—Systems for the transmission of television signals using pulse code modulation
- H04N7/52—Systems for transmission of a pulse code modulated video signal with one or more other pulse code modulated signals, e.g. an audio signal or a synchronizing signal
- H04N7/54—Systems for transmission of a pulse code modulated video signal with one or more other pulse code modulated signals, e.g. an audio signal or a synchronizing signal the signals being synchronous
- H04N7/56—Synchronising systems therefor
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
Abstract
PURPOSE:To eliminate the need for a synchronous extracting circuit and to improve band compression effect by compressing the band of a television signal assumed as frame length irrelevant to a synchronizing signal, and then adding a frame header part to each frame. CONSTITUTION:An analog signal from a television camera 11 is converted by an A/D converting circuit 12 into a digital signal, which is applied to a band compressing circuit 13. The band-compressed signal is applied to a buffer memory 14 and the contents of a counter 16 which counts a write clock are used as an address to perform writing operation. For the reading of the buffer memory 14, the contents of a counter 17 which counts a read clock are used as an address, and a frame header part is added at every prescribed period before transmission. A comparing circuit 18 compares the contents of both the counters with each other to detect the amount of generated information, and then sets frame length according to their difference.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6633281A JPS57181285A (en) | 1981-04-30 | 1981-04-30 | Television signal transmission system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6633281A JPS57181285A (en) | 1981-04-30 | 1981-04-30 | Television signal transmission system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57181285A true JPS57181285A (en) | 1982-11-08 |
Family
ID=13312781
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6633281A Pending JPS57181285A (en) | 1981-04-30 | 1981-04-30 | Television signal transmission system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57181285A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6033789A (en) * | 1983-08-03 | 1985-02-21 | Matsushita Electric Ind Co Ltd | Method for transmitting picture to be coded |
-
1981
- 1981-04-30 JP JP6633281A patent/JPS57181285A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6033789A (en) * | 1983-08-03 | 1985-02-21 | Matsushita Electric Ind Co Ltd | Method for transmitting picture to be coded |
JPH0228949B2 (en) * | 1983-08-03 | 1990-06-27 | Matsushita Electric Ind Co Ltd |
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