JPS57181211A - Frequency converting circuit - Google Patents

Frequency converting circuit

Info

Publication number
JPS57181211A
JPS57181211A JP56065922A JP6592281A JPS57181211A JP S57181211 A JPS57181211 A JP S57181211A JP 56065922 A JP56065922 A JP 56065922A JP 6592281 A JP6592281 A JP 6592281A JP S57181211 A JPS57181211 A JP S57181211A
Authority
JP
Japan
Prior art keywords
modulated signal
amplitude
level
input terminal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56065922A
Other languages
Japanese (ja)
Inventor
Tsuneo Tateshimo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56065922A priority Critical patent/JPS57181211A/en
Publication of JPS57181211A publication Critical patent/JPS57181211A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14Balanced arrangements
    • H03D7/1425Balanced arrangements with transistors
    • H03D7/1433Balanced arrangements with transistors using bipolar transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14Balanced arrangements
    • H03D7/1425Balanced arrangements with transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14Balanced arrangements
    • H03D7/1425Balanced arrangements with transistors
    • H03D7/1458Double balanced arrangements, i.e. where both input signals are differential
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D2200/00Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
    • H03D2200/0041Functional aspects of demodulators
    • H03D2200/0043Bias and operating point

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplitude Modulation (AREA)

Abstract

PURPOSE:To prevent a spurious phenomenon and to stably adjust a high frequency output level by adjusting the amplitude of only an AC component when applying the modulated signal of an unbalanced differential oscillating circuit to a double balanced type modulating circuit. CONSTITUTION:At one output terminal of an unbalanced differential oscillating circuit A, a modulated signal appears through amplitude limiters 17 and 18, and at the other output terminal, a DC voltage is developed. On the other hand, a DC voltage is divided and applied to one bias input terminal of a double balanced type modulating circuit B, and at the other modulated signal input terminal, differential amplifiers Q11-Q16 where signals are inputted after the amplitude level of said modulated signal is set by resistance voltage division so that a DC level equal to that of the bias input terminal side is obtained are used. Between modulated signal input terminals 11 and 12 where a carrier is inputted, and an earth potential, a series circuit 22 of a DC-stopping capacitor and a variable resistance capable of controlling a frequency conversion output level by adjusting the amplitude level of only the AC component of the modulated signal is connected.
JP56065922A 1981-04-30 1981-04-30 Frequency converting circuit Pending JPS57181211A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56065922A JPS57181211A (en) 1981-04-30 1981-04-30 Frequency converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56065922A JPS57181211A (en) 1981-04-30 1981-04-30 Frequency converting circuit

Publications (1)

Publication Number Publication Date
JPS57181211A true JPS57181211A (en) 1982-11-08

Family

ID=13300941

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56065922A Pending JPS57181211A (en) 1981-04-30 1981-04-30 Frequency converting circuit

Country Status (1)

Country Link
JP (1) JPS57181211A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS645211A (en) * 1987-06-29 1989-01-10 Matsushita Electric Ind Co Ltd Mixer device
CN107493072A (en) * 2016-06-09 2017-12-19 亚德诺半导体集团 The buffer of headroom with enhancing

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS645211A (en) * 1987-06-29 1989-01-10 Matsushita Electric Ind Co Ltd Mixer device
CN107493072A (en) * 2016-06-09 2017-12-19 亚德诺半导体集团 The buffer of headroom with enhancing
CN107493072B (en) * 2016-06-09 2021-03-09 亚德诺半导体集团 Buffer with enhanced headroom

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