JPS5718108A - Digital gain controlling circuit - Google Patents

Abstract

PURPOSE:To execute an operation processing at a high speed without deteriorating a resolution of information, and to execute a gain control smoothly, by executing a regular operation by a multiplier when gain (g) is 0<=g<1, controlling the gain, and outputting a waveform information directly in case of (g)=1. CONSTITUTION:Waveform information fp of (n) bits is supplied to a multiplier together with gain information (g) of m-1 bits, and n+m-1 bits are outputted. 1/2<m-1> is operated 22 to output upper (n) bits, and are provided to a selecting circuit 23 together with fp. The information (g) represents 0<=g<=1 by (m) bit representation, a detecting part 24 discriminates the uppermost bit, supplies a gain information of m-1 bits to a multiplier 21, also changes over the selecting circuit 23, executes control of 0<=g<1 and (g)=1, and when the uppermost bit of (g) is ''1'', the waveform information fp is outputted directly. Therefore, even if a multiplier which has not enough room for the number of bits is used, a high speed operation and a smooth gain control are executed without deteriorating a resolution of the waveform information.