JPS57176410A - Process controller - Google Patents

Process controller

Info

Publication number
JPS57176410A
JPS57176410A JP6059581A JP6059581A JPS57176410A JP S57176410 A JPS57176410 A JP S57176410A JP 6059581 A JP6059581 A JP 6059581A JP 6059581 A JP6059581 A JP 6059581A JP S57176410 A JPS57176410 A JP S57176410A
Authority
JP
Japan
Prior art keywords
arrangement
pio
lkl
pij
physical arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6059581A
Other languages
Japanese (ja)
Inventor
Kazuaki Onchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6059581A priority Critical patent/JPS57176410A/en
Publication of JPS57176410A publication Critical patent/JPS57176410A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B15/00—Systems controlled by a computer

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • Control By Computers (AREA)

Abstract

PURPOSE:To arrange PIO signals suitable for the hardware with smooth designing, by avoiding mutual effect between the physical arrangement of a process input and output signals and the logical arrangement on the software. CONSTITUTION:Pij is the physical arrangement of a process input and output device PIO signal groups, Lkl is the logical arrangement of the PIO signal groups, and (f) is the conversion matrix converting the Pij and the Lkl mutually. The PIO signal groups P1, P2-Pn are converted into the physical arrangement on the software with Lkl=f(Pij) represented with the physical arrangement Pij. Thus, in the design of the software group when the PIO signals are accessed, the design is possble with the logical arrangement Lkl and the physical arrangement Pij can be determined independently of the physical arrangement Lkl. If the arrangement change of the PIO signals takes place, only the part of the converting matrix (f) can be changed.
JP6059581A 1981-04-23 1981-04-23 Process controller Pending JPS57176410A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6059581A JPS57176410A (en) 1981-04-23 1981-04-23 Process controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6059581A JPS57176410A (en) 1981-04-23 1981-04-23 Process controller

Publications (1)

Publication Number Publication Date
JPS57176410A true JPS57176410A (en) 1982-10-29

Family

ID=13146740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6059581A Pending JPS57176410A (en) 1981-04-23 1981-04-23 Process controller

Country Status (1)

Country Link
JP (1) JPS57176410A (en)

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