JPS5717318B2 - - Google Patents

Info

Publication number
JPS5717318B2
JPS5717318B2 JP12964874A JP12964874A JPS5717318B2 JP S5717318 B2 JPS5717318 B2 JP S5717318B2 JP 12964874 A JP12964874 A JP 12964874A JP 12964874 A JP12964874 A JP 12964874A JP S5717318 B2 JPS5717318 B2 JP S5717318B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP12964874A
Other languages
Japanese (ja)
Other versions
JPS5093747A (US06633600-20031014-M00021.png
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS5093747A publication Critical patent/JPS5093747A/ja
Publication of JPS5717318B2 publication Critical patent/JPS5717318B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
    • G11C11/4023—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using field effect transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
    • H03K17/24—Storing the actual state when the supply voltage fails
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0036—Means reducing energy consumption

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP12964874A 1973-12-10 1974-11-12 Expired JPS5717318B2 (US06633600-20031014-M00021.png)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US423422A US3870901A (en) 1973-12-10 1973-12-10 Method and apparatus for maintaining the charge on a storage node of a mos circuit
US426889A US3882467A (en) 1973-12-10 1973-12-20 Complementary field effect transistor memory cell

Publications (2)

Publication Number Publication Date
JPS5093747A JPS5093747A (US06633600-20031014-M00021.png) 1975-07-26
JPS5717318B2 true JPS5717318B2 (US06633600-20031014-M00021.png) 1982-04-09

Family

ID=27025991

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12964874A Expired JPS5717318B2 (US06633600-20031014-M00021.png) 1973-12-10 1974-11-12

Country Status (5)

Country Link
US (2) US3870901A (US06633600-20031014-M00021.png)
JP (1) JPS5717318B2 (US06633600-20031014-M00021.png)
DE (1) DE2458848C2 (US06633600-20031014-M00021.png)
FR (1) FR2255678B1 (US06633600-20031014-M00021.png)
GB (1) GB1485499A (US06633600-20031014-M00021.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0227067Y2 (US06633600-20031014-M00021.png) * 1983-08-24 1990-07-23

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE28905E (en) * 1967-10-19 1976-07-13 Bell Telephone Laboratories, Incorporated Field effect transistor memory cell
JPS5430617B2 (US06633600-20031014-M00021.png) * 1974-09-04 1979-10-02
GB1502270A (en) * 1974-10-30 1978-03-01 Hitachi Ltd Word line driver circuit in memory circuit
US3980935A (en) * 1974-12-16 1976-09-14 Worst Bernard I Volatile memory support system
JPS5199418A (en) * 1975-02-27 1976-09-02 Laurel Bank Machine Co Teidenjino ic memoriihojikairo
US3970950A (en) * 1975-03-21 1976-07-20 International Business Machines Corporation High common mode rejection differential amplifier utilizing enhancement depletion field effect transistors
US4004170A (en) * 1975-04-29 1977-01-18 International Business Machines Corporation MOSFET latching driver
DE2519323C3 (de) * 1975-04-30 1979-07-12 Siemens Ag, 1000 Berlin Und 8000 Muenchen Statisches Drei-Transistoren-Speicherelement
US4005395A (en) * 1975-05-08 1977-01-25 Sperry Rand Corporation Compatible standby power driver for a dynamic semiconductor
US4030084A (en) * 1975-11-28 1977-06-14 Honeywell Information Systems, Inc. Substrate bias voltage generated from refresh oscillator
US4175290A (en) * 1977-07-28 1979-11-20 Hughes Aircraft Company Integrated semiconductor memory array having improved logic latch circuitry
US4258430A (en) * 1978-02-08 1981-03-24 Tyburski Robert M Information collection and storage system with removable memory
US4189785A (en) * 1978-04-26 1980-02-19 National Semiconductor Corporation Complementary MOS memory array including complementary MOS memory cells therefor
US4463270A (en) * 1980-07-24 1984-07-31 Fairchild Camera & Instrument Corp. MOS Comparator circuit
US4532607A (en) * 1981-07-22 1985-07-30 Tokyo Shibaura Denki Kabushiki Kaisha Programmable circuit including a latch to store a fuse's state
US4447746A (en) * 1981-12-31 1984-05-08 International Business Machines Corporation Digital photodetectors
JPS60136084A (ja) * 1983-12-26 1985-07-19 Hitachi Ltd 半導体集積回路装置
JPH0795395B2 (ja) * 1984-02-13 1995-10-11 株式会社日立製作所 半導体集積回路
JP2937546B2 (ja) * 1991-05-30 1999-08-23 シャープ株式会社 外部電源端子を備える小型電子機器のメモリ保護装置
US5559455A (en) * 1994-12-23 1996-09-24 Lucent Technologies Inc. Sense amplifier with overvoltage protection
US5805496A (en) * 1996-12-27 1998-09-08 International Business Machines Corporation Four device SRAM cell with single bitline
EP0983593B1 (en) * 1998-03-18 2004-01-14 Koninklijke Philips Electronics N.V. Semi-conductor device with a memory cell
US6484265B2 (en) * 1998-12-30 2002-11-19 Intel Corporation Software control of transistor body bias in controlling chip parameters
JP6470284B2 (ja) * 2013-11-15 2019-02-13 日本テキサス・インスツルメンツ合同会社 デプリーションモードトランジスタを制御するための方法及び回路要素

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3431433A (en) * 1964-05-29 1969-03-04 Robert George Ball Digital storage devices using field effect transistor bistable circuits

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3518635A (en) * 1967-08-22 1970-06-30 Bunker Ramo Digital memory apparatus
US3533087A (en) * 1967-09-15 1970-10-06 Rca Corp Memory employing transistor storage cells
US3502909A (en) * 1968-12-10 1970-03-24 Shell Oil Co Pulsed substrate transistor inverter
US3621302A (en) * 1969-01-15 1971-11-16 Ibm Monolithic-integrated semiconductor array having reduced power consumption
GB1296067A (US06633600-20031014-M00021.png) * 1969-03-21 1972-11-15
US3579204A (en) * 1969-03-24 1971-05-18 Sperry Rand Corp Variable conduction threshold transistor memory circuit insensitive to threshold deviations
JPS5211199B1 (US06633600-20031014-M00021.png) * 1970-05-27 1977-03-29
US3702990A (en) * 1971-02-02 1972-11-14 Rca Corp Variable threshold memory system using minimum amplitude signals

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3431433A (en) * 1964-05-29 1969-03-04 Robert George Ball Digital storage devices using field effect transistor bistable circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0227067Y2 (US06633600-20031014-M00021.png) * 1983-08-24 1990-07-23

Also Published As

Publication number Publication date
US3870901A (en) 1975-03-11
US3882467A (en) 1975-05-06
DE2458848C2 (de) 1982-03-11
FR2255678B1 (US06633600-20031014-M00021.png) 1976-12-31
GB1485499A (en) 1977-09-14
FR2255678A1 (US06633600-20031014-M00021.png) 1975-07-18
JPS5093747A (US06633600-20031014-M00021.png) 1975-07-26
DE2458848A1 (de) 1975-06-26

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