JPS57166664A - Memory allocate device for electronic cash register - Google Patents
Memory allocate device for electronic cash registerInfo
- Publication number
- JPS57166664A JPS57166664A JP56050703A JP5070381A JPS57166664A JP S57166664 A JPS57166664 A JP S57166664A JP 56050703 A JP56050703 A JP 56050703A JP 5070381 A JP5070381 A JP 5070381A JP S57166664 A JPS57166664 A JP S57166664A
- Authority
- JP
- Japan
- Prior art keywords
- file
- memory
- stored
- room
- area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
- G06Q30/00—Commerce
- G06Q30/04—Billing or invoicing
Landscapes
- Business, Economics & Management (AREA)
- Development Economics (AREA)
- Accounting & Taxation (AREA)
- Economics (AREA)
- Finance (AREA)
- Marketing (AREA)
- Strategic Management (AREA)
- Physics & Mathematics (AREA)
- General Business, Economics & Management (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Cash Registers Or Receiving Machines (AREA)
Abstract
PURPOSE:To utilize memory areas effectively by storing the addresses of the 2nd memory whose capacity is smaller than that of the 1st memory in the 1st memory and, when the 2nd memory is specified, searching an area in which data are not yet stored by the data in the 2nd memory and storing the address in the 1st memory. CONSTITUTION:A keyboard 1 provided with a commodity key, an operation key, a PLU key specifying room charge, a room sharing key, etc. are connected to the CPU2 of an electronic cash register used in a hotel. A display device 6, a p rinter 7, an ROM3, and an RAM5 with the 1st and 2nd storage areas are also connected to the CPU2. The RAM5 is provided with a room file 31, which is provided with a basic file 32 and a split file 33 whose storage area is less than that of the file 32 and the data for the 2nd guest of a sharing room is stored in the file 33. The address of the file 33 is stored in the file 32 and, when the keyboard 1 specifies the file 33, an unstored area of the file 33 is searched and the searched area is stored in the file 32.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56050703A JPS57166664A (en) | 1981-04-03 | 1981-04-03 | Memory allocate device for electronic cash register |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56050703A JPS57166664A (en) | 1981-04-03 | 1981-04-03 | Memory allocate device for electronic cash register |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57166664A true JPS57166664A (en) | 1982-10-14 |
Family
ID=12866256
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56050703A Pending JPS57166664A (en) | 1981-04-03 | 1981-04-03 | Memory allocate device for electronic cash register |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57166664A (en) |
-
1981
- 1981-04-03 JP JP56050703A patent/JPS57166664A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
MY104380A (en) | Memory cartridge | |
SE7704963L (en) | KEY REGISTER-CONTROLLED ACCESS SYSTEM | |
KR850002909A (en) | Automatic memory board relocation device | |
KR910003500A (en) | Fast access of multiple words from multidirectional set associative cache memory | |
GB1353925A (en) | Data processing system | |
GB1504112A (en) | Interactive enquiry systems | |
JPS54128634A (en) | Cash memory control system | |
US3778776A (en) | Electronic computer comprising a plurality of general purpose registers and having a dynamic relocation capability | |
ES8503868A1 (en) | Buffer-storage control system. | |
GB1110994A (en) | Data storage addressing system | |
JPS57166664A (en) | Memory allocate device for electronic cash register | |
GB871256A (en) | Improvements in data storage systems | |
ES416400A1 (en) | Data processing systems | |
ES397793A1 (en) | Computer input-output chaining system | |
GB1167336A (en) | Improvements in or relating to Data Processing Devices | |
JPS57191764A (en) | Storage device | |
JPS558628A (en) | Data processing system | |
JPS57159329A (en) | Function key discriminating system | |
JPS5740790A (en) | Storage control system | |
JPS5567865A (en) | Electronic desk computer | |
JPS5724083A (en) | Buffer memory | |
JPS5733472A (en) | Memory access control system | |
JPS5696361A (en) | Calssification processing device | |
JPS55119745A (en) | Information processing unit | |
JPS55117780A (en) | Buffer memory unit |