JPS57160275A - Vertical synchronizing device - Google Patents
Vertical synchronizing deviceInfo
- Publication number
- JPS57160275A JPS57160275A JP4600881A JP4600881A JPS57160275A JP S57160275 A JPS57160275 A JP S57160275A JP 4600881 A JP4600881 A JP 4600881A JP 4600881 A JP4600881 A JP 4600881A JP S57160275 A JPS57160275 A JP S57160275A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- pulse
- vertical
- vsync
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/08—Separation of synchronising signals from picture signals
- H04N5/10—Separation of line synchronising signal from frame synchronising signal or vice versa
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Synchronizing For Television (AREA)
Abstract
PURPOSE:To assure the merit of application of the vetical synchronizing pulse to maximum, by examining whether a prescribed relation exists between the horizontal and vertical synchronizing pulses to detect the missing of the vertical synchronising pulse and as a result delivering the divided pulse even in case the vertical pulse is missing. CONSTITUTION:The vertical synchronizing pulse Vsync plus 2fH of an integer place of the horizontal synchronizing pulse Hsync are supplied to a discriminat- ing circuit 1 for vertical synchronizing pulse frequency. A circuit which generates the horizontal frequency and its integer-fold frequency synchronizing with pulses Hsync and Vsync that control a vertical output circuit 5 plus a circuit that divides the output signal of the first-mentioned circuit with a prescribed dividing ratio are installed to the circuit 1. The outputs of these circuits are applied to an automatic-direct synchronization switching circuit 2. Furthermore a frequency dividing circuit 3 that oscillates a frequency synchronous with the pulse Vsync and a vertical oscillating circuit 4 are installed, and the circuit 2 is controlled with the outputs of the circuits 3 and 4. Then the relation is checked between the pulses Vsync=Hsync, and the divided pulse is delivered also in case the pulse Vsync is missing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4600881A JPS57160275A (en) | 1981-03-27 | 1981-03-27 | Vertical synchronizing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4600881A JPS57160275A (en) | 1981-03-27 | 1981-03-27 | Vertical synchronizing device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57160275A true JPS57160275A (en) | 1982-10-02 |
JPS6137824B2 JPS6137824B2 (en) | 1986-08-26 |
Family
ID=12735031
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4600881A Granted JPS57160275A (en) | 1981-03-27 | 1981-03-27 | Vertical synchronizing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57160275A (en) |
-
1981
- 1981-03-27 JP JP4600881A patent/JPS57160275A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6137824B2 (en) | 1986-08-26 |
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