JPS57152723A - Digital frequency multiplier - Google Patents
Digital frequency multiplierInfo
- Publication number
- JPS57152723A JPS57152723A JP56038478A JP3847881A JPS57152723A JP S57152723 A JPS57152723 A JP S57152723A JP 56038478 A JP56038478 A JP 56038478A JP 3847881 A JP3847881 A JP 3847881A JP S57152723 A JPS57152723 A JP S57152723A
- Authority
- JP
- Japan
- Prior art keywords
- sine wave
- multiplier
- output
- input sine
- amplitude
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
Landscapes
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE:To keep the phase between an input sine wave and a multiplied output sine wave constant, by squaring the input sine wave and subtracting the square value of the amplitude of the input sine wave from the output of this squaring and multiplying the subtraction result by the reciprocal of the amplitude of the input sine wave. CONSTITUTION:An input sine wave is denoted as Acos(omegat+psi). The input sine wave is squared by a multiplier 2, and a square value A<2> of the amplitude of the input sine wave is obtained by a level detector 4 and is applied to a subtractor 6. Sine the amplitude of the output of the multiplier 2 is multiplied in a doubling multiplier 3 by 2, the output of the subtractor 6 becomes A<2>{2cos<2> (omegat+psi)-1}and is applied to a multiplier 8. The value of 1/A is obtained by a reciprocal generator 7 and is applied to the multiplier, and the output of the multiplier 8 becomes A{2cos<2>(omegat+psi)-1}, and thus, a sine wave having a two- fold frequency is obtained at an output terminal 9.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56038478A JPS57152723A (en) | 1981-03-17 | 1981-03-17 | Digital frequency multiplier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56038478A JPS57152723A (en) | 1981-03-17 | 1981-03-17 | Digital frequency multiplier |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57152723A true JPS57152723A (en) | 1982-09-21 |
Family
ID=12526359
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56038478A Pending JPS57152723A (en) | 1981-03-17 | 1981-03-17 | Digital frequency multiplier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57152723A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62109440A (en) * | 1985-11-07 | 1987-05-20 | Matsushita Electric Ind Co Ltd | Multiplex demodulation device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5138858A (en) * | 1974-09-27 | 1976-03-31 | Matsushita Electric Ind Co Ltd | SHUHASUTEIBAIKAIRO |
JPS5432056A (en) * | 1977-08-16 | 1979-03-09 | Toshiba Corp | Frequency multiplying circuit |
-
1981
- 1981-03-17 JP JP56038478A patent/JPS57152723A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5138858A (en) * | 1974-09-27 | 1976-03-31 | Matsushita Electric Ind Co Ltd | SHUHASUTEIBAIKAIRO |
JPS5432056A (en) * | 1977-08-16 | 1979-03-09 | Toshiba Corp | Frequency multiplying circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62109440A (en) * | 1985-11-07 | 1987-05-20 | Matsushita Electric Ind Co Ltd | Multiplex demodulation device |
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