JPS553054A - Function generator - Google Patents

Function generator

Info

Publication number
JPS553054A
JPS553054A JP7536878A JP7536878A JPS553054A JP S553054 A JPS553054 A JP S553054A JP 7536878 A JP7536878 A JP 7536878A JP 7536878 A JP7536878 A JP 7536878A JP S553054 A JPS553054 A JP S553054A
Authority
JP
Japan
Prior art keywords
supplied
integrating
memory
output
ramp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7536878A
Other languages
Japanese (ja)
Inventor
Kenji Fujikata
Norio Yokozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7536878A priority Critical patent/JPS553054A/en
Publication of JPS553054A publication Critical patent/JPS553054A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To secure generation of a short-time ramp function with no error for the function generator which generates the ramp voltage, by installing the means comprising the memory or the like which sets the integrating time previously.
CONSTITUTION: The difference signal between the terminating and starting voltage of the ramp function is produced at logic circuit 11 and then supplied to memory 15 along with the slope signal of the ramp function. The subtraction counter changes over switch 18 to the (b) side when the integrating time signal is supplied from memory 15 to set the counter. Thus the output voltage of D/A converter 14 is supplied to integrating amplifier 20, and at the same time the subtraction is carried out by the clock supplied from clock generator 17. When the contents of subtraction counter 16 becomes zero, switch 18 is changed over to the (a) side with the integrating output clamped near the target voltage level. And then the output is finally set to the target voltage level given from D/A converter 12.
COPYRIGHT: (C)1980,JPO&Japio
JP7536878A 1978-06-23 1978-06-23 Function generator Pending JPS553054A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7536878A JPS553054A (en) 1978-06-23 1978-06-23 Function generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7536878A JPS553054A (en) 1978-06-23 1978-06-23 Function generator

Publications (1)

Publication Number Publication Date
JPS553054A true JPS553054A (en) 1980-01-10

Family

ID=13574199

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7536878A Pending JPS553054A (en) 1978-06-23 1978-06-23 Function generator

Country Status (1)

Country Link
JP (1) JPS553054A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0037207A2 (en) * 1980-04-02 1981-10-07 Gec Avionics Limited Signal generating arrangements
JPS61115628A (en) * 1984-11-08 1986-06-03 Sumitomo Metal Ind Ltd Manufacture of pipe having non-circular sectional form made of alpha+beta type titanium alloy

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0037207A2 (en) * 1980-04-02 1981-10-07 Gec Avionics Limited Signal generating arrangements
JPS61115628A (en) * 1984-11-08 1986-06-03 Sumitomo Metal Ind Ltd Manufacture of pipe having non-circular sectional form made of alpha+beta type titanium alloy
JPH0454527B2 (en) * 1984-11-08 1992-08-31 Sumitomo Metal Ind

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