JPS57152026A - Method and apparatus for self-control of decentralized priority competition - Google Patents

Method and apparatus for self-control of decentralized priority competition

Info

Publication number
JPS57152026A
JPS57152026A JP3537881A JP3537881A JPS57152026A JP S57152026 A JPS57152026 A JP S57152026A JP 3537881 A JP3537881 A JP 3537881A JP 3537881 A JP3537881 A JP 3537881A JP S57152026 A JPS57152026 A JP S57152026A
Authority
JP
Japan
Prior art keywords
common resource
time
self
control
resource
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3537881A
Other languages
Japanese (ja)
Other versions
JPS6024979B2 (en
Inventor
Hiromasa Yamaoka
Yuzaburo Iwasa
Kazuhisa Matsunaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3537881A priority Critical patent/JPS6024979B2/en
Priority to US06/356,891 priority patent/US4494113A/en
Priority to DE3209037A priority patent/DE3209037A1/en
Publication of JPS57152026A publication Critical patent/JPS57152026A/en
Publication of JPS6024979B2 publication Critical patent/JPS6024979B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To achieve priority control for utilization of common resource even in a decentralized type, by enabling to use the common resource when a measuring lapse time is equal to a time inherent to a device, in a system in which a plurality of devices share the common resource. CONSTITUTION:In device 11-13 sharing one resource 10, whether the common resource 10 is used at present to any of the devices 11, 13 or not is discriminated, and the lapsed time is measured from the time when the common resource 10 is not in use or the forecast time when it will not be used, and when the measured lapse time is equal to an inherent time which is different from each other and set to each device, if the device requests the use of the common resource 10, the right of use of the common resource 10 is acquired, allowing to use the common resource 10.
JP3537881A 1981-03-13 1981-03-13 Self-control method and device for distributed priority competition Expired JPS6024979B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP3537881A JPS6024979B2 (en) 1981-03-13 1981-03-13 Self-control method and device for distributed priority competition
US06/356,891 US4494113A (en) 1981-03-13 1982-03-10 Method and apparatus for self-control in distributed priority collision
DE3209037A DE3209037A1 (en) 1981-03-13 1982-03-12 METHOD AND ARRANGEMENT FOR SELF-CONTROL IN A DISTRIBUTED PRIORITY COLLISION

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3537881A JPS6024979B2 (en) 1981-03-13 1981-03-13 Self-control method and device for distributed priority competition

Publications (2)

Publication Number Publication Date
JPS57152026A true JPS57152026A (en) 1982-09-20
JPS6024979B2 JPS6024979B2 (en) 1985-06-15

Family

ID=12440231

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3537881A Expired JPS6024979B2 (en) 1981-03-13 1981-03-13 Self-control method and device for distributed priority competition

Country Status (1)

Country Link
JP (1) JPS6024979B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6473839A (en) * 1987-09-14 1989-03-20 Nec Corp Method and device for access control
WO1990003003A1 (en) * 1988-09-02 1990-03-22 Fanuc Ltd Interruption control method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6473839A (en) * 1987-09-14 1989-03-20 Nec Corp Method and device for access control
JPH0624374B2 (en) * 1987-09-14 1994-03-30 日本電気株式会社 Access control method and apparatus
WO1990003003A1 (en) * 1988-09-02 1990-03-22 Fanuc Ltd Interruption control method

Also Published As

Publication number Publication date
JPS6024979B2 (en) 1985-06-15

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