JPS57150259A - Circuit scanning system - Google Patents

Circuit scanning system

Info

Publication number
JPS57150259A
JPS57150259A JP56035040A JP3504081A JPS57150259A JP S57150259 A JPS57150259 A JP S57150259A JP 56035040 A JP56035040 A JP 56035040A JP 3504081 A JP3504081 A JP 3504081A JP S57150259 A JPS57150259 A JP S57150259A
Authority
JP
Japan
Prior art keywords
circuit
connecting mechanism
numbers
lut
hardware
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56035040A
Other languages
Japanese (ja)
Inventor
Haruo Sugizaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56035040A priority Critical patent/JPS57150259A/en
Publication of JPS57150259A publication Critical patent/JPS57150259A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22—Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To remarkably elevate the utilization efficiency of hardware, by constituting so that circuit scanning numbers supplied to a circuit connecting mechanism from plural circuit scanning mechanisms have each different value. CONSTITUTION:A circuit connecting mechanism 3 is provided with a circuit number converting circuit 4. Also, the 0-th-(n/2-1)-th circuits stored in a circuit connecting mechanism LUT#2 are stored in the n/2-(n-1)-th circuit position of a circuit connecting mechanism 3LUT#1. The mechanism 2 itself generates the 0-th-(n/2-1)-th circuit scanning numbers, but sends them out to the mechanism 3 after converting to the n/2-th-(n-1)-th numbers by the circuit 4. Therefore, the mechanism LUT#2 becomes unnecessary, also the remaining mechanism 3 is operated by 100% utilization factor, and the utilization efficiency of hardware is elevated remarkably.
JP56035040A 1981-03-11 1981-03-11 Circuit scanning system Pending JPS57150259A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56035040A JPS57150259A (en) 1981-03-11 1981-03-11 Circuit scanning system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56035040A JPS57150259A (en) 1981-03-11 1981-03-11 Circuit scanning system

Publications (1)

Publication Number Publication Date
JPS57150259A true JPS57150259A (en) 1982-09-17

Family

ID=12430925

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56035040A Pending JPS57150259A (en) 1981-03-11 1981-03-11 Circuit scanning system

Country Status (1)

Country Link
JP (1) JPS57150259A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59108140A (en) * 1982-12-14 1984-06-22 Fujitsu Ltd Method for converting address of circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59108140A (en) * 1982-12-14 1984-06-22 Fujitsu Ltd Method for converting address of circuit
JPH0129338B2 (en) * 1982-12-14 1989-06-09 Fujitsu Ltd

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