JPS57143987A - Reception state detecting circuit of television receiver - Google Patents
Reception state detecting circuit of television receiverInfo
- Publication number
- JPS57143987A JPS57143987A JP56029430A JP2943081A JPS57143987A JP S57143987 A JPS57143987 A JP S57143987A JP 56029430 A JP56029430 A JP 56029430A JP 2943081 A JP2943081 A JP 2943081A JP S57143987 A JPS57143987 A JP S57143987A
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- counter
- frequency
- reception state
- tuner
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/50—Tuning indicators; Automatic tuning control
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Receiver Circuits (AREA)
Abstract
PURPOSE:To achieve detection of malfunction-free accurate reception state, by counting a coincidence signal regarding a horizontal synchronizing signal and a flyback pulse, and detecting whether a broadcast is received or not. CONSTITUTION:During search channel selection, the frequency division ratio of the programmable divider 15 of a frequency synthesizer PLL circuit B varies stepwise gradually and the reception frequency of a tuner 2 also varies. At a specific frequency division ratio, a signal from a broadcasting station is received, and then while a horizontal synchronizing signal is outputted from asynchronous separating circuit 8, a flyback pulse is outputted from a flyback transformer 11 as well, so that a similar pulse is generated by an AND gate 19. This pulse is counted by a counter 20 and when the counter 20 goes up to a prescribed number until it is cleared, the output of the counter 20 is activated to stop a search by a controller 21, so that the channel frequency of the tuner 2 is fixed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56029430A JPS57143987A (en) | 1981-03-03 | 1981-03-03 | Reception state detecting circuit of television receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56029430A JPS57143987A (en) | 1981-03-03 | 1981-03-03 | Reception state detecting circuit of television receiver |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57143987A true JPS57143987A (en) | 1982-09-06 |
Family
ID=12275918
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56029430A Pending JPS57143987A (en) | 1981-03-03 | 1981-03-03 | Reception state detecting circuit of television receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57143987A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60194882A (en) * | 1984-03-16 | 1985-10-03 | Matsushita Electric Ind Co Ltd | Non-signal display device |
-
1981
- 1981-03-03 JP JP56029430A patent/JPS57143987A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60194882A (en) * | 1984-03-16 | 1985-10-03 | Matsushita Electric Ind Co Ltd | Non-signal display device |
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