JPS57143782A - Information processor - Google Patents

Information processor

Info

Publication number
JPS57143782A
JPS57143782A JP56029349A JP2934981A JPS57143782A JP S57143782 A JPS57143782 A JP S57143782A JP 56029349 A JP56029349 A JP 56029349A JP 2934981 A JP2934981 A JP 2934981A JP S57143782 A JPS57143782 A JP S57143782A
Authority
JP
Japan
Prior art keywords
address
bit
address conversion
converted
main storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56029349A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0319572B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Fumitaka Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56029349A priority Critical patent/JPS57143782A/ja
Priority to US06/351,859 priority patent/US4491911A/en
Publication of JPS57143782A publication Critical patent/JPS57143782A/ja
Publication of JPH0319572B2 publication Critical patent/JPH0319572B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP56029349A 1981-03-03 1981-03-03 Information processor Granted JPS57143782A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP56029349A JPS57143782A (en) 1981-03-03 1981-03-03 Information processor
US06/351,859 US4491911A (en) 1981-03-03 1982-02-24 Data processing system with improved address translation facility

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56029349A JPS57143782A (en) 1981-03-03 1981-03-03 Information processor

Publications (2)

Publication Number Publication Date
JPS57143782A true JPS57143782A (en) 1982-09-06
JPH0319572B2 JPH0319572B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-03-15

Family

ID=12273736

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56029349A Granted JPS57143782A (en) 1981-03-03 1981-03-03 Information processor

Country Status (2)

Country Link
US (1) US4491911A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS57143782A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5994289A (ja) * 1982-11-22 1984-05-30 Hitachi Ltd 記憶制御方式
US5148538A (en) * 1989-10-20 1992-09-15 International Business Machines Corporation Translation look ahead based cache access
JP2503702B2 (ja) * 1989-12-19 1996-06-05 日本電気株式会社 アドレス変換装置
US5282274A (en) * 1990-05-24 1994-01-25 International Business Machines Corporation Translation of multiple virtual pages upon a TLB miss
US5946691A (en) * 1996-05-15 1999-08-31 Microsoft Corporation Method of presenting, storing, and updating a filing identifier for a data record
US8656141B1 (en) * 2004-12-13 2014-02-18 Massachusetts Institute Of Technology Architecture and programming in a parallel processing environment with switch-interconnected processors
US7805577B1 (en) 2006-04-14 2010-09-28 Tilera Corporation Managing memory access in a parallel processing environment
US7620791B1 (en) 2006-04-14 2009-11-17 Tilera Corporation Mapping memory in a parallel processing environment
US7624248B1 (en) 2006-04-14 2009-11-24 Tilera Corporation Managing memory in a parallel processing environment

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5315779A (en) * 1976-07-26 1978-02-14 Rca Corp Method of operating charge coupled device and input circuit
JPS55142476A (en) * 1979-04-24 1980-11-07 Nec Corp Address conversion system for information processing system

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3947823A (en) * 1973-12-26 1976-03-30 International Business Machines Corp. Means for coordinating asynchronous main store accesses in a multiprocessing system using virtual storage
JPS52149444A (en) * 1976-06-08 1977-12-12 Fujitsu Ltd Multiplex virtual space processing data processing system
US4084230A (en) * 1976-11-29 1978-04-11 International Business Machines Corporation Hybrid semiconductor memory with on-chip associative page addressing, page replacement and control
US4155119A (en) * 1977-09-21 1979-05-15 Sperry Rand Corporation Method for providing virtual addressing for externally specified addressed input/output operations
US4376297A (en) * 1978-04-10 1983-03-08 Signetics Corporation Virtual memory addressing device
US4373179A (en) * 1978-06-26 1983-02-08 Fujitsu Limited Dynamic address translation system
US4277826A (en) * 1978-10-23 1981-07-07 Collins Robert W Synchronizing mechanism for page replacement control
JPS5576447A (en) * 1978-12-01 1980-06-09 Fujitsu Ltd Address control system for software simulation
US4355355A (en) * 1980-03-19 1982-10-19 International Business Machines Corp. Address generating mechanism for multiple virtual spaces

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5315779A (en) * 1976-07-26 1978-02-14 Rca Corp Method of operating charge coupled device and input circuit
JPS55142476A (en) * 1979-04-24 1980-11-07 Nec Corp Address conversion system for information processing system

Also Published As

Publication number Publication date
JPH0319572B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-03-15
US4491911A (en) 1985-01-01

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