JPS57141087A - Write system for storage device - Google Patents

Write system for storage device

Info

Publication number
JPS57141087A
JPS57141087A JP2653081A JP2653081A JPS57141087A JP S57141087 A JPS57141087 A JP S57141087A JP 2653081 A JP2653081 A JP 2653081A JP 2653081 A JP2653081 A JP 2653081A JP S57141087 A JPS57141087 A JP S57141087A
Authority
JP
Japan
Prior art keywords
storage device
bytes
byte
data
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2653081A
Other languages
Japanese (ja)
Inventor
Noriyuki Toyoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2653081A priority Critical patent/JPS57141087A/en
Publication of JPS57141087A publication Critical patent/JPS57141087A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Abstract

PURPOSE:To shorten the write time and facilitate the production, by generating a write enable signal or a chip select signal on a basis of a byte designating signal to update directly data of a storage device. CONSTITUTION:In case that bytes 0 and 1 out of bytes 0-(n) in a store data register SDR are updated, 1 is set to bytes 0 and 1 of a byte mark register BMR; and when a write timing signal is outputted, AND circuits AND0 and AND1 become conductive to output signal ''1'', and data of the 0th byte and the first byte in a storage device MU are rewritten with data of corresponding bytes of the register SDR. Thus, operations for data read and selection of the storage device are unnecessary to shorten the write time, and a selecting circuit is not required to facilitate the production.
JP2653081A 1981-02-25 1981-02-25 Write system for storage device Pending JPS57141087A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2653081A JPS57141087A (en) 1981-02-25 1981-02-25 Write system for storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2653081A JPS57141087A (en) 1981-02-25 1981-02-25 Write system for storage device

Publications (1)

Publication Number Publication Date
JPS57141087A true JPS57141087A (en) 1982-09-01

Family

ID=12196031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2653081A Pending JPS57141087A (en) 1981-02-25 1981-02-25 Write system for storage device

Country Status (1)

Country Link
JP (1) JPS57141087A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6343246U (en) * 1986-09-02 1988-03-23
JPH03164849A (en) * 1989-11-22 1991-07-16 Matsushita Electric Ind Co Ltd Microprocessor and microprocessor system
CN109582596A (en) * 2017-09-29 2019-04-05 英特尔公司 It is read out from the mode register that there is difference to read and write timing

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4932546A (en) * 1972-07-25 1974-03-25
JPS49123526A (en) * 1973-03-30 1974-11-26
JPS5459839A (en) * 1977-10-20 1979-05-14 Nec Corp Information processor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4932546A (en) * 1972-07-25 1974-03-25
JPS49123526A (en) * 1973-03-30 1974-11-26
JPS5459839A (en) * 1977-10-20 1979-05-14 Nec Corp Information processor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6343246U (en) * 1986-09-02 1988-03-23
JPH03164849A (en) * 1989-11-22 1991-07-16 Matsushita Electric Ind Co Ltd Microprocessor and microprocessor system
CN109582596A (en) * 2017-09-29 2019-04-05 英特尔公司 It is read out from the mode register that there is difference to read and write timing
CN109582596B (en) * 2017-09-29 2024-02-23 索尼公司 Reading from mode registers with different read and write timings

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