JPS5713888A - Memory constitution system of stored-program control electronic switchboard - Google Patents

Memory constitution system of stored-program control electronic switchboard

Info

Publication number
JPS5713888A
JPS5713888A JP8809280A JP8809280A JPS5713888A JP S5713888 A JPS5713888 A JP S5713888A JP 8809280 A JP8809280 A JP 8809280A JP 8809280 A JP8809280 A JP 8809280A JP S5713888 A JPS5713888 A JP S5713888A
Authority
JP
Japan
Prior art keywords
cnc
memory
rdt
indication
subscriber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8809280A
Other languages
Japanese (ja)
Other versions
JPS5912228B2 (en
Inventor
Takaaki Sato
Yuji Matsuo
Takashi Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP8809280A priority Critical patent/JPS5912228B2/en
Publication of JPS5713888A publication Critical patent/JPS5713888A/en
Publication of JPS5912228B2 publication Critical patent/JPS5912228B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54508—Configuration, initialisation
    • H04Q3/54533—Configuration data, translation, passwords, databases

Landscapes

  • Engineering & Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE:To simplify the constitution of a memory by providing dedicated program blocks and common program blocks, and by constituting a memory for classification by specific applied functions by coupling those program blocks. CONSTITUTION:The LOP of a subscriber-line switching step LS couples necessary program blocks with a CNC-LS, RSR-LS, RDT-LS, and other LSs to constitute part of a memory M. When the calling of a subscriber is detected by another program block, the CNC acquires selectively an OR and other blocks upon occasion and connects an LIN and a TLN via a CC-SPC to form a train of an SUB, LIN, TLN, and OR. Then, an indication of dial number reception is sent to the RST-LS. The RSR-LS scans and monitors the OR to receive all numbers and informs the CNC of dial number information. Then, the CNC sends an indication of translation of the dial number to the RDT-LS. On the basis of the indication, the RDT-LS determines the outgoing route of a party subscriber and informs the CNC of that.
JP8809280A 1980-06-28 1980-06-28 Memory configuration method for storage program control electronic switching equipment Expired JPS5912228B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8809280A JPS5912228B2 (en) 1980-06-28 1980-06-28 Memory configuration method for storage program control electronic switching equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8809280A JPS5912228B2 (en) 1980-06-28 1980-06-28 Memory configuration method for storage program control electronic switching equipment

Publications (2)

Publication Number Publication Date
JPS5713888A true JPS5713888A (en) 1982-01-23
JPS5912228B2 JPS5912228B2 (en) 1984-03-21

Family

ID=13933218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8809280A Expired JPS5912228B2 (en) 1980-06-28 1980-06-28 Memory configuration method for storage program control electronic switching equipment

Country Status (1)

Country Link
JP (1) JPS5912228B2 (en)

Also Published As

Publication number Publication date
JPS5912228B2 (en) 1984-03-21

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