JPS57118406A - Double balance mixer circuit - Google Patents
Double balance mixer circuitInfo
- Publication number
- JPS57118406A JPS57118406A JP383681A JP383681A JPS57118406A JP S57118406 A JPS57118406 A JP S57118406A JP 383681 A JP383681 A JP 383681A JP 383681 A JP383681 A JP 383681A JP S57118406 A JPS57118406 A JP S57118406A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- mixer circuit
- baluns
- plus
- supplied
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1408—Balanced arrangements with diodes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplitude Modulation (AREA)
Abstract
PURPOSE:To realize a plane circuit for a mixer circuit that performs the frequency conversion at the SHF band, by equivalently forming a diode bridge with use of baluns and eliminating the cross part between the input lines. CONSTITUTION:The baluns 13-15 have the intermediate taps which are grounded at the secondary side and applies the force of balance with phases adverse to each other. The phase is set adverse for the first signal that is supplied to the balun from a terminal 16. The first signal is applied to diodes D3 and D4 plus D1 and D2 from terminals 11 and 12. At the same time, the phase is set adverse for the 2nd signal that is supplied to the baluns 14 and 15 form a terminal 17. This end signal is supplied to the D4 and D3 plus D1 and D2 from terminals 9' and 10' plus 9'' and 10'' respectively. In such constitution, the 1st and 2nd signals are applied efficiently to the diodes D1-D4, and the cross part is eliminated between the input lines. Thus an excellent mixer circuit is obtained with no deterioration caused to the high frequency characteristics.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP383681A JPS57118406A (en) | 1981-01-16 | 1981-01-16 | Double balance mixer circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP383681A JPS57118406A (en) | 1981-01-16 | 1981-01-16 | Double balance mixer circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57118406A true JPS57118406A (en) | 1982-07-23 |
Family
ID=11568265
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP383681A Pending JPS57118406A (en) | 1981-01-16 | 1981-01-16 | Double balance mixer circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57118406A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8644787B1 (en) * | 2010-06-09 | 2014-02-04 | Rockwell Collins, Inc. | Apparatus and method for forming multiple independent and dynamically adaptable intermediate frequency signals |
-
1981
- 1981-01-16 JP JP383681A patent/JPS57118406A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8644787B1 (en) * | 2010-06-09 | 2014-02-04 | Rockwell Collins, Inc. | Apparatus and method for forming multiple independent and dynamically adaptable intermediate frequency signals |
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