JPS5711538A - Phase synchronizing signal generator - Google Patents

Phase synchronizing signal generator

Info

Publication number
JPS5711538A
JPS5711538A JP8623080A JP8623080A JPS5711538A JP S5711538 A JPS5711538 A JP S5711538A JP 8623080 A JP8623080 A JP 8623080A JP 8623080 A JP8623080 A JP 8623080A JP S5711538 A JPS5711538 A JP S5711538A
Authority
JP
Japan
Prior art keywords
frequency
terminal
counter
count
signal generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8623080A
Other languages
Japanese (ja)
Inventor
Kenji Ito
Masahiko Motai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8623080A priority Critical patent/JPS5711538A/en
Publication of JPS5711538A publication Critical patent/JPS5711538A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation

Abstract

PURPOSE:To perform signal processing digitally and accurately, by frequency- dividing a carry output of an up-down counter presettable in a phase synchronizing signal generator and making switching control for the up-and down-operation. CONSTITUTION:A presettable counter 11 has a preset input terminal Di and output terminal Qi, a carry output terminal 15 is connected to a frequency divider 16 and also applied to an AND circuit 17 together with an input pulse train P. The output terminal of the frequency divider 16 is connected to an up-and down- switching terminal 14 of a counter 11 for up/down control. When no input pulse P is present, the up/down count of clock pulses at a terminal 13 is repeated every circulation of period and the frequency divider 16 produces a given free oscillating frequency 30Hz. Next, when a pulse train P in frequency 35Hz is incoming, the content of counter is shifted by one bit with the first pulse and it is inputted to a preset input terminal Di for down count, and the frequency divier 16 is switched with a borrow output and the synchronism is achieved by repeating the preset and count sequentially.
JP8623080A 1980-06-25 1980-06-25 Phase synchronizing signal generator Pending JPS5711538A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8623080A JPS5711538A (en) 1980-06-25 1980-06-25 Phase synchronizing signal generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8623080A JPS5711538A (en) 1980-06-25 1980-06-25 Phase synchronizing signal generator

Publications (1)

Publication Number Publication Date
JPS5711538A true JPS5711538A (en) 1982-01-21

Family

ID=13880985

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8623080A Pending JPS5711538A (en) 1980-06-25 1980-06-25 Phase synchronizing signal generator

Country Status (1)

Country Link
JP (1) JPS5711538A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63214817A (en) * 1987-03-04 1988-09-07 Nec Corp Remote power source inputting system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63214817A (en) * 1987-03-04 1988-09-07 Nec Corp Remote power source inputting system

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