JPS57115055A - Multiplex concentrator and alloter device - Google Patents

Multiplex concentrator and alloter device

Info

Publication number
JPS57115055A
JPS57115055A JP124581A JP124581A JPS57115055A JP S57115055 A JPS57115055 A JP S57115055A JP 124581 A JP124581 A JP 124581A JP 124581 A JP124581 A JP 124581A JP S57115055 A JPS57115055 A JP S57115055A
Authority
JP
Japan
Prior art keywords
speed
low
receiving data
alloter
control part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP124581A
Other languages
Japanese (ja)
Inventor
Fusayoshi Aso
Fumio Akiyama
Tomoo Motohashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP124581A priority Critical patent/JPS57115055A/en
Publication of JPS57115055A publication Critical patent/JPS57115055A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/50—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication
    • H04L12/52—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques
    • H04L12/525—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques involving a stored program control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To lower the frequency of appearance of synchronizing characters to enhance the multiplexing degree of a trunk circuit, by transmitting and receiving data of respective low-speed lines with plural bytes corresponding to their communication speeds as units in one frame on the high-speed trunk circuit. CONSTITUTION:In case of data transfer from the center side to the terminal side, a high-speed line control part 103 of a multiplex concentrator and alloter device 4 scans low-speed circuits 102 successively and transmits data, which are stored in these circuits 102 and are received from low-speed lines 2, to a high- speed trunk circuit 6 along the format shown in figure. Meanwhile, in a concentrator and alloter device 7 in the terminal side, a high-speed line control part 104 monitors the receiving of synchronizing characters; and when detecting synchronizing characters, the control part 104 sets a counter 105 5o ''8''. Succeeding receiving data is transferred to a low-speed line channel (CH1) 106 in bit parallel each time one character is received. The counter 105 is increased by +1 each time one bit of receiving data is received; and when count contents become ''40'', the transfer destination of receiving data is switched to a channel (CH2) 106.
JP124581A 1981-01-09 1981-01-09 Multiplex concentrator and alloter device Pending JPS57115055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP124581A JPS57115055A (en) 1981-01-09 1981-01-09 Multiplex concentrator and alloter device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP124581A JPS57115055A (en) 1981-01-09 1981-01-09 Multiplex concentrator and alloter device

Publications (1)

Publication Number Publication Date
JPS57115055A true JPS57115055A (en) 1982-07-17

Family

ID=11496059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP124581A Pending JPS57115055A (en) 1981-01-09 1981-01-09 Multiplex concentrator and alloter device

Country Status (1)

Country Link
JP (1) JPS57115055A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04100337A (en) * 1990-08-17 1992-04-02 Mitsubishi Electric Corp Time division multiplexer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04100337A (en) * 1990-08-17 1992-04-02 Mitsubishi Electric Corp Time division multiplexer

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