CA1168392A - Data transmission - Google Patents
Data transmissionInfo
- Publication number
- CA1168392A CA1168392A CA000330703A CA330703A CA1168392A CA 1168392 A CA1168392 A CA 1168392A CA 000330703 A CA000330703 A CA 000330703A CA 330703 A CA330703 A CA 330703A CA 1168392 A CA1168392 A CA 1168392A
- Authority
- CA
- Canada
- Prior art keywords
- data
- bits
- envelopes
- channels
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/50—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication
- H04L12/52—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques
- H04L12/525—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques involving a stored program control
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Communication Control (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Details Of Connecting Devices For Male And Female Coupling (AREA)
- Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
- Selective Calling Equipment (AREA)
Abstract
Abstract Disclosed is a method for the transmission of data in a synchronous data network, wherein the data is transmitted in the form of groups in envelopes composed of control bits and data bits and wherein data channels assigned to data terminal devices can be connected to the data network via data connection devices. Each data channel is assigned at least one data bit of at least one envelope, and the control bits of the envelopes define frames for the mutual assignment of the data channels and the data bits. Due to utilisation of the envelopes for the transmission of data in accordance with a t.d.m. process elaborate synchronising devices are not required to divide the data into the individual data channels. The control bits of the envelopes are used as a frame characterisation for a channel division without any disturbance to their original function. As only unstructured data can be transmitted in the individual data channels, the process is particularly suitable for the multiple exploitation of dedicated connections in the data network. The envelopes are transmitted in the same way as envelopes whose data bits are assigned to only one single data channel.
Description
9~
The invention relates to ~ method for the transmission of data in a synchronous data network, wherein data is transmitted in ~he form of groups in envelopes composed of control bits and data bits, and wherein data channels - 5 assigned to data terminal devices can be connected to the data network via data connection devices.
It is already generally known to transmlt data between data terminal devices using the telephone network.
The data terminal devices are connected to the telephone network via data transmission devices which are usually referred to as modems. If a plurality of data terminal devices is provided in a subscriber station, each data terminal device need not be connected via a separate modem to a telephone line, if the modem is preceded by lS an interface multiplier or a channel divider. When an interface multiplier is used the modem is connected to a selected one o the terminal devices. The channel divider operates in accordance with a t.d~m. process and consecutively switches through the data channels which are assigned to the individual data terminal devices to the modem. However, the interface multiplier has the disadvantage that only one data terminal device at a time can be connected to a remote subscriber, and the channel divider has the disadvantage that the assignment to the individual data channels requires a considerable outlay.
Another known method o transmitting data consists
The invention relates to ~ method for the transmission of data in a synchronous data network, wherein data is transmitted in ~he form of groups in envelopes composed of control bits and data bits, and wherein data channels - 5 assigned to data terminal devices can be connected to the data network via data connection devices.
It is already generally known to transmlt data between data terminal devices using the telephone network.
The data terminal devices are connected to the telephone network via data transmission devices which are usually referred to as modems. If a plurality of data terminal devices is provided in a subscriber station, each data terminal device need not be connected via a separate modem to a telephone line, if the modem is preceded by lS an interface multiplier or a channel divider. When an interface multiplier is used the modem is connected to a selected one o the terminal devices. The channel divider operates in accordance with a t.d~m. process and consecutively switches through the data channels which are assigned to the individual data terminal devices to the modem. However, the interface multiplier has the disadvantage that only one data terminal device at a time can be connected to a remote subscriber, and the channel divider has the disadvantage that the assignment to the individual data channels requires a considerable outlay.
Another known method o transmitting data consists
-2 33~;~
in the use of a ~ynchr~nous data network in which the data terminal devices are connected to the data network via data connection devices. The data connection devices combine the data emanating from the clata terminal devices into blocks which are referxed to as envelopes.
Each enve]ope possesses a constant length and consists - of a glven, constant number of data bits and two control bits which are referred to as a synchronising bit and a status bit. The control bits are arranged, for example, at the beginning o~ the envelope or the envelope commences with the synchronising bit and ends with the status bit. The synchronising bit facilitates the identification of the data bits and the recovery of the status bit from a received bit flow. The status bit informs a switching device in the data network as to whether the data contained in the data bits consists of communications from subscriber to subscriber or consists of communications for the exchanges involved in the connection or control information for the data terminal devices.
In accordance with CCITT X.50, two formats, namely a 6+2 structure and an 8+2 structure are known for the formation of the envelopes. In the former case the envelopes are composed of six data bits, one synchronising bit and one status bit. In the latter case the envelopes are formed from eight data bits, one synchronising bit and one status blt. As, d~ring the transmisslon ; .
in the use of a ~ynchr~nous data network in which the data terminal devices are connected to the data network via data connection devices. The data connection devices combine the data emanating from the clata terminal devices into blocks which are referxed to as envelopes.
Each enve]ope possesses a constant length and consists - of a glven, constant number of data bits and two control bits which are referred to as a synchronising bit and a status bit. The control bits are arranged, for example, at the beginning o~ the envelope or the envelope commences with the synchronising bit and ends with the status bit. The synchronising bit facilitates the identification of the data bits and the recovery of the status bit from a received bit flow. The status bit informs a switching device in the data network as to whether the data contained in the data bits consists of communications from subscriber to subscriber or consists of communications for the exchanges involved in the connection or control information for the data terminal devices.
In accordance with CCITT X.50, two formats, namely a 6+2 structure and an 8+2 structure are known for the formation of the envelopes. In the former case the envelopes are composed of six data bits, one synchronising bit and one status bit. In the latter case the envelopes are formed from eight data bits, one synchronising bit and one status blt. As, d~ring the transmisslon ; .
3~
.
of data, the envelopes are formed ln the data connection devices at the subscriber station, the envelopes are transmitted via th~ subscriber co~nection line to the assigned exchange. As a result of the additional control bits, the gross bit flow to be transmitted exceeds the net bit flow betweer. the data terminal device and the data connection device by 33~ or 25~ as the case may be.
The known data con~ection devices are constructed with one channel and consequently can exchange data only with one data terminal device. It would be conceivable to precede a data connection device by an inter~ace multiplier, but an arrangement of this kind would have the dlsadvantage that only one data terminal device could emit data to the data network at a given time.
It would also be conceivable to connect a plurallty of data terminal devices to the data connection aevice via a channel divider which, similarly to a t.d~m.
process, connects the data terminal devices to the data connection device. If a conventional t.d.m. process were used, additional synchronising devices would b~
required to establish the correct assignment between the data channels at the transmitting subscriber station and at the receiving subscriber station.
Therefore the aim of the invention is to provide means whereby data emitted from a plurality of data terminal devices can ~e transmitted in a synchronous, envelope-structured data network, multiply exploiting the connection paths.
According to the present invention there is provided a method for : operating a data transmission system having data channels for emittirlg and receiving data in which data bits are synchronously transmitted together with control bits in envelopesl comprising forming each envelope to include data bits of at least two data channels emitting data, and utilizing the control bits as sole synchronizing informati.on for bit and bit group synchronization.
Thus, due to the utiliæation of the envelopes for the transmission of data in accordance with a t.d.m. process elaborate synchroniz:ing devices are not required to divide the data i.nto the individual da~a channels. The control bits of the envelopes are used as a frame characteriæat:ion for a channel division without any disturbance to their original function. As only unstructured data can be transmitted in the individual data channels, the process is particularly suitable for the multiple exploitation of dedicated connections in the data network. The envelopes are transmitted in the same ~ way as envelopes whose data bits are assignèd, in known manner, to only one ; single data channel.
If the data bit flow of the data channels is `~'~r~
equal to the n~th part of the net bit ~low of the envelopes, where n is the number of data bits in an envelope, it is expedient for the data channels to each be assigned one data bit of an envelope.
If the data bit ~low of the data channels is equal to a multiple of the n-th part o~ the net bit flow of the envelopes, the data channels are promptly classified into the envelopes if the data channels are each assigned a plurality of data bits of at least one envelope.
I the sum of the data bits assigned to the ~ata channels is e~ual to the number of data bits in an envelope, it is expedient for the data channels to each be assigned the data bits of one envelope.
If the sum of the data bits assiglled to the data channels diffexs from the number of data bits in an envelope, it is advantageous for the data channels to each be assigned data bits of a plurality of envelopes.
In order to correctly assign the data channels to the data bits it is advantageous to derive the correctly timed combination of the plurality of envelopes from the information of the control bits~ ~owever, if the control bits are required for the data network their ` 25 ~unction must not be restricted by this measure.
A circuit arrangement for the implemenation of the process requires only a low outlay if the data connec~ion device is preceded by a channel divider which combines a plurality o~ data channels assigned to the data terminal devices and at the transmitting end assigns the data channels to the data bits of the envelopes and/or at the receiving end distributes the data bits of the envelopes amongst the data channels.
A simple embodiment of the circuit arrangement is characterised in that for each data channel, the chamlel divider contains a tran~mitting-ena shift register and a receiving-end shift reyister which intermediately store the data assigned to the data channels prior to transfer into the data connection device or following transfer from the data connection device as the case may be. Here it is expedient for the length of the shift registers to be equal to the number of data bits assigned to the relevant data channel.
If the data channels are each assigned data bits of a plurality of envelopes, it is e~pedient for the ~ata connection device to contain, both at the transmitting end and at the receiving end, a plurality of shift registers which accommodate envelopes and which are connected to the shift registers assigned to the data channels.
In order to be able to transmit data via the ~5 data connection devices to the data network both on one channel and on a plurality of channels, it is advantageous to provide change-over switches via which timing pulses 3~
produced in a transmitting-end pulse generator and in a receiving~end synchronising device are selectively fed to further shift registers or frequency dividers which are provided in the data connection device and which produce transmitting- and receiving-pulse trains assigne~ to the plurality of data channels.
Exemplary embodiments of the invention will now be described with reference t:o the accompanying drawings, . in which :-Figure 1 is a block circuit diagram of a part o~ a known data transmission arrangement;
Figure 2 is a block circuit diagram of a data transmission arrangement;
Figure 3 illustrates envelopes in the case of one-channel transmission and multi-channel transmission;
. Figure 4 shows illustrations of two combined :~ envelopes in the case of one-channel transmission and multi-channel transmission; and Figure 5 is a block circuit diagram of a data ~ 20 connection device provided with a channel divider.
; In that part of a known data transmissionarrangement which is illustrated in figure 1, data is transmitted from a plurality of data terminal devices El to En to data connection devices AGl to AG_ via data channels 1~1 to Kn. The data connection devices AGl, to AGn represent the connection between the data terminal devices El to En and a synchronous data network, which ' }3~
has been represented in the drawing mexely by subscriber lines TLl to TLn and a t.d.m. system ZM preceded by transmission units U1 to Un.
The data to be transmitted from a transmitting subscriber to a receiving subscriber is emitted from the data terminal device, for example the data terminal device El, to the data connection device AGl via the data channel Kl. The data connec~ion device AGl assembles the data in the form of blocks and forms the envelopes for the transparent transmission of data over the synchronous data network. For example~ eight data bits are in each case provided, with two control bits, namely one synchronising bit and one sta-tus bit. The data connection device AGl also produces signals which are suitable for the relevant mode of transmission and with the aid of which the envelopes are emitted via the sub-scriber line TLl to the transmission unit Ul and then to the t.d.m. system.
In the receivin~ subscriber station the signals are transmitted from transmission units corresponding to the transmission units Ul to Un via subscriber lines to the data connection devices assigned to the data terminal devices thexein. The data connection devices recover the envelopes from the signals, separate the control ~its, and transmit the data contained in tpe data bits to the corresponding data terminal device.
Tf data is to be simultaneously transmitted bet~7een other data terminal devices, in known data transmission arrangements it is necessary to ~se further data connection devices which are assigned to the relevant data terminal devices and which each txansmit the data via separate subscriber lines.
In the data transmission arrangement illustrated in figure 2, however, the simultaneous transmission of data from or to a plurality of data terminal devices requires only one single data connection device ~G and one subscribex line. The dat:a connection device AG is preceded by a channel divider KT via which the data channels Kl to Kn can be switched thxough to the data network. l'he channel divider KT assigns data bits of the envelopes to the data channels Kl to Xn and emits these data bits to the data connection device AG. The data connection device AG transmits the envelope-structured data in known manner across the subscriber line TL to a transmission unit U and emits the data to a t.d.m. system. Envelopes which arrive from the t.d.m.
system via the subscriber line TL in a corresponding data connection device of the receiving subscriber station are freed of the contxol bits in the data connection d~vice, and the data bits are emitted to a corresponding channel divider by which they are assigned to the individual channels.
As only unstructured data can be transmitted in the data channels Kl to Kn because it is not possible to carry out an additional speed transformation for the formation of the enve-lopes, the data is expediently transmitted in the data network via dedlcated connections. ~lowever, it is also possible to multiply exploit subscriber lines for dialling operation. In this case the criteria for switching can, for example, be transmitted by the insertion of a further synchroniæing bit.
The envelope illustrated in :Line a of figure 3 contains, in known manner, two control bits, namely a synchroniæing bit s and a status bit A, and eight data bits D. In the known data transmission arrangement as iLlustrated in figure 1, the data bits D are assigned to one single data channel between a data terminal device and a data connection device. This data channel may have a transmission speed of Eor example 2~00, ~800, 7200 or 9600 bit/s. The data connection device is designed, for example, for a t-ransmission speed of up to 9600 bit/s. The addition of the control bits S and A results in a : gross transmission speed of 12000 bit/s on that side of the data connection device facing towards the subscriber line with a net transmission speed of 9600 bit/s. The following description will be based upon these transmission speed values.
In the case of the envelope illustrated in line b, in accordance with figure 2, four data channels are .
.~
:
~.. ..
combined hy the channel diYider. Each of the d~ta ci~nnels has a transmission speed of ~400 bit/s so that a net transmission speed of 9600 bit/s is again produced at the output of the data connection device AG. The data bits of the envelopes are consecu-tively assigned to the data channels which are referenced 1 to 4. Thus each envelope serves to transmit data from all four data terminal devices in the data network.
Similarly, in the case of the envelope illustrated in line c, two data channels each having a transmission speed of 4800 bit/s are internested. By way of a further example, line d shows an envelope in which the data bits are assigned to three data channels, the data channel 1 having a transmission speed of 4800 bit/s, and the data channels 2 and 3 having trans~ission speeds of 2400 bit/s. In the case of the envelope illustrated in line e, the data channel 1 has a transmission speed of 7200 bit/s and the data channel 2 has a transmission speed of 2400 bit/s.
The number of data bits which are assigned to a data channel is proportional to its transmission speed.
If n is the number of data bits in an envelope, the number of data bits assigned to the channel is equal to the n-th quotient of the transmission speed of that channel and the net transmission speed of the envelqpe~
If the calculation of the numbex of data bits assigned to a data channel does not result in a whole ~12-~;839Z
n~nber, a plurality o~ envelopes are combined and the data channels are distributed amongst these envelopes.
The two envelopes illustrated in line a of figure 4 each contain two control bits S and A and six data bits D or D'. If these en~elopes are to be used at a net transmission speed of 9600 bit/s to transmit four data channels each of 2400 bit/s, these data channels 1 to 4 are distributed between the two envelopes in accordance with the illustration in line b.
When the data bits are assigned to two data channels each having a transmission speed of 4800 bit/s, it is not essential to combine two envelopes, as shown in line c. Here three bits can be assigned to the first data channel and three bits to the second data channel in ~, .
an envelope, similarly as in figure 3~
Lines d and e, similarly to lines d and e in figure 3, illustrate the distribution of three and two data channels respectively of 4800 and 2400, and 7200 and 2400 bit/s respectively. As in line b, here again two envelopes are required in order to uniformly assign the data channels in accordance with their transmission speeds to the data bits of the envelopes. The alternation 1-0-1 ... of the sync~ronising bits S of the consecutive envelopes are used to form a super fr~n~.
~5 The channel divider KT illustrated in figure, 5 is designed for the connection of two data channels each of 4800 bit/s. A data connection device AG which ~l~6~
has likewise been shown is provided for a net transW
mission speed of 9600 bit/s.
Data emanating from the data terminal device El is fed in the form of signals Sl to a shift register SRl.
A pulse generator TG of the clata connection device produces timing pulses Tl at a frequency corresponding to the transmission speed of 9600 bit/s. Via a switch SWl which, in the case of multi-c:hannel transmission, occupies the solid-line position, the timing pulses Tl are fed to a freuqency divider Fl which emits to the data terminal device El transmission pulses T2 whose repetition frequency is half that of the timing pulses Tl. With the aid of these transmittea clock pulses T2, the data corresponding tc thesignals Sl is also input into the shift register - 15 SRl in serial fashion. At the same time the data terminal device E2 emits data in the ~orm of signals S2 to a shift register SR2. The data terminal device E2 - is likewise supplied with the transmission pulses T2 and the data corresponding to thesignals S2 is input ~0 into the shift register SR2 in serial fashion. The outputs of the shift registers SRl and SR2 are connected to the parallel inputs of a shift register SR3 in the data connection device and the states of the storage cells of the register SR3 change in accordance with the states of the storage cells of the shift registers SRl and SR2 to which they are connected.
The pulse generator TG produces timing pulses T3 with which the contents of the register SR3 are trans-ferred into a shift register SR4. Simultaneously the two control bits S and A are input into the first two positions oP this shift register SR4. The pulse generator TG then supplies the shift register SR4 with timing pulses T4 having a repetition frequency which corresponds to the gross transmission speed of the envelopes. With the aid of these timing pulses the contents of the shift register SR4 is transfe:rred in serial fashion to a transmitter SE which is provided with a scrambler, a coder, and a pulse shaper and which emits transmitted signals via a subscriber line TLS to the data netwoxk.
If the data connection device is also to be used for one-channel transmission, the registPr S3 is also a shift register and the data from the data terminal device is supplied in the form o signals S3 to the serial input of the shift register SR3. The change-over switch SWl assumes the broken-line position and the timing pulses Tl are fed to the data terminal device in the form of a transmitted pulse train with which the data contained in the signals S3 are input in serial fashion into the shift register SR3. Then, as in the case of multi-channel operation, the contents of the shift register SR3 is transferred into the shift register SR4 and transmitted.
Received signals incoming via a subscribPr line TLE
are fed to a recei~er EM of the data connection device.
The receiver EM contains a regulating amplifier, an automatic distortion corrector, a decoder, and a descrambler, and from its output emits signals S4 which each represent a received envelope. The receiver EM is connected to a synchronising device SY which produces timing pulses T5 with the aid of which ~he data contai~ed in the signals S4 can be input into a shift register SR5. When the synchronising bit S is recognised, the synchronising device SY ~nits a timing pulse T6 to a shift register SR6 ~Jhich receives only the data bits of the envelope. Then~ in accordance with the assignment of the data channels to the data bits of the envelope, part of the contents of the shift register SR6 i5 transferred into a shiit register SR7 and part into a shift register SR8.
The synchronising device SY emits timing pulses T7 whose repetition frequency corresponds to the net transmission speed of 9600 bit/s. Via a change-over switch SW2 which occupies the broken-line position, the - timing pulses T7 are fed to a frecuency divider F2 which halves the repetition frequency of the timing pulses T7 and supplies the shift registers SR7 and SR8 with timing pulses T8 whereby their contents are read out in serial fashion. The data emitted at their serial outputs is fed to the data terminal devices El and E2 in the form of s gnals S5 and S6 respectively. The frequ~ncy divider 5~ also emits the timing pul~es T8 as associated received clock pulses to the data terminal devices El and E2.
3~
In the case of one-channel operati~n of the data connection device, the change~over switch SW2 also assumes the broken-line position and~ following transfer from the shift register SR5, the contents of the shift register SR6 is read-out in serial fashion. Signals S7 emitted at its output represe:nt the received data and are forwarded to the correspo:nding data terminal device together with a receiving pulse train T7.
When a plurality of envelopes are used in place of the circuit arrangement i~ustrated in figure 5 for the transmission of envelopes composed of eight data bits and two control bits, the shift registers SR3 to SR6 are designed to accommodate the corresponding nu~ber of envelopes and the transfer into the shift registers SR4 and SR6 is carried out in accordance with the number of combined envelopesO
.
of data, the envelopes are formed ln the data connection devices at the subscriber station, the envelopes are transmitted via th~ subscriber co~nection line to the assigned exchange. As a result of the additional control bits, the gross bit flow to be transmitted exceeds the net bit flow betweer. the data terminal device and the data connection device by 33~ or 25~ as the case may be.
The known data con~ection devices are constructed with one channel and consequently can exchange data only with one data terminal device. It would be conceivable to precede a data connection device by an inter~ace multiplier, but an arrangement of this kind would have the dlsadvantage that only one data terminal device could emit data to the data network at a given time.
It would also be conceivable to connect a plurallty of data terminal devices to the data connection aevice via a channel divider which, similarly to a t.d~m.
process, connects the data terminal devices to the data connection device. If a conventional t.d.m. process were used, additional synchronising devices would b~
required to establish the correct assignment between the data channels at the transmitting subscriber station and at the receiving subscriber station.
Therefore the aim of the invention is to provide means whereby data emitted from a plurality of data terminal devices can ~e transmitted in a synchronous, envelope-structured data network, multiply exploiting the connection paths.
According to the present invention there is provided a method for : operating a data transmission system having data channels for emittirlg and receiving data in which data bits are synchronously transmitted together with control bits in envelopesl comprising forming each envelope to include data bits of at least two data channels emitting data, and utilizing the control bits as sole synchronizing informati.on for bit and bit group synchronization.
Thus, due to the utiliæation of the envelopes for the transmission of data in accordance with a t.d.m. process elaborate synchroniz:ing devices are not required to divide the data i.nto the individual da~a channels. The control bits of the envelopes are used as a frame characteriæat:ion for a channel division without any disturbance to their original function. As only unstructured data can be transmitted in the individual data channels, the process is particularly suitable for the multiple exploitation of dedicated connections in the data network. The envelopes are transmitted in the same ~ way as envelopes whose data bits are assignèd, in known manner, to only one ; single data channel.
If the data bit flow of the data channels is `~'~r~
equal to the n~th part of the net bit ~low of the envelopes, where n is the number of data bits in an envelope, it is expedient for the data channels to each be assigned one data bit of an envelope.
If the data bit ~low of the data channels is equal to a multiple of the n-th part o~ the net bit flow of the envelopes, the data channels are promptly classified into the envelopes if the data channels are each assigned a plurality of data bits of at least one envelope.
I the sum of the data bits assigned to the ~ata channels is e~ual to the number of data bits in an envelope, it is expedient for the data channels to each be assigned the data bits of one envelope.
If the sum of the data bits assiglled to the data channels diffexs from the number of data bits in an envelope, it is advantageous for the data channels to each be assigned data bits of a plurality of envelopes.
In order to correctly assign the data channels to the data bits it is advantageous to derive the correctly timed combination of the plurality of envelopes from the information of the control bits~ ~owever, if the control bits are required for the data network their ` 25 ~unction must not be restricted by this measure.
A circuit arrangement for the implemenation of the process requires only a low outlay if the data connec~ion device is preceded by a channel divider which combines a plurality o~ data channels assigned to the data terminal devices and at the transmitting end assigns the data channels to the data bits of the envelopes and/or at the receiving end distributes the data bits of the envelopes amongst the data channels.
A simple embodiment of the circuit arrangement is characterised in that for each data channel, the chamlel divider contains a tran~mitting-ena shift register and a receiving-end shift reyister which intermediately store the data assigned to the data channels prior to transfer into the data connection device or following transfer from the data connection device as the case may be. Here it is expedient for the length of the shift registers to be equal to the number of data bits assigned to the relevant data channel.
If the data channels are each assigned data bits of a plurality of envelopes, it is e~pedient for the ~ata connection device to contain, both at the transmitting end and at the receiving end, a plurality of shift registers which accommodate envelopes and which are connected to the shift registers assigned to the data channels.
In order to be able to transmit data via the ~5 data connection devices to the data network both on one channel and on a plurality of channels, it is advantageous to provide change-over switches via which timing pulses 3~
produced in a transmitting-end pulse generator and in a receiving~end synchronising device are selectively fed to further shift registers or frequency dividers which are provided in the data connection device and which produce transmitting- and receiving-pulse trains assigne~ to the plurality of data channels.
Exemplary embodiments of the invention will now be described with reference t:o the accompanying drawings, . in which :-Figure 1 is a block circuit diagram of a part o~ a known data transmission arrangement;
Figure 2 is a block circuit diagram of a data transmission arrangement;
Figure 3 illustrates envelopes in the case of one-channel transmission and multi-channel transmission;
. Figure 4 shows illustrations of two combined :~ envelopes in the case of one-channel transmission and multi-channel transmission; and Figure 5 is a block circuit diagram of a data ~ 20 connection device provided with a channel divider.
; In that part of a known data transmissionarrangement which is illustrated in figure 1, data is transmitted from a plurality of data terminal devices El to En to data connection devices AGl to AG_ via data channels 1~1 to Kn. The data connection devices AGl, to AGn represent the connection between the data terminal devices El to En and a synchronous data network, which ' }3~
has been represented in the drawing mexely by subscriber lines TLl to TLn and a t.d.m. system ZM preceded by transmission units U1 to Un.
The data to be transmitted from a transmitting subscriber to a receiving subscriber is emitted from the data terminal device, for example the data terminal device El, to the data connection device AGl via the data channel Kl. The data connec~ion device AGl assembles the data in the form of blocks and forms the envelopes for the transparent transmission of data over the synchronous data network. For example~ eight data bits are in each case provided, with two control bits, namely one synchronising bit and one sta-tus bit. The data connection device AGl also produces signals which are suitable for the relevant mode of transmission and with the aid of which the envelopes are emitted via the sub-scriber line TLl to the transmission unit Ul and then to the t.d.m. system.
In the receivin~ subscriber station the signals are transmitted from transmission units corresponding to the transmission units Ul to Un via subscriber lines to the data connection devices assigned to the data terminal devices thexein. The data connection devices recover the envelopes from the signals, separate the control ~its, and transmit the data contained in tpe data bits to the corresponding data terminal device.
Tf data is to be simultaneously transmitted bet~7een other data terminal devices, in known data transmission arrangements it is necessary to ~se further data connection devices which are assigned to the relevant data terminal devices and which each txansmit the data via separate subscriber lines.
In the data transmission arrangement illustrated in figure 2, however, the simultaneous transmission of data from or to a plurality of data terminal devices requires only one single data connection device ~G and one subscribex line. The dat:a connection device AG is preceded by a channel divider KT via which the data channels Kl to Kn can be switched thxough to the data network. l'he channel divider KT assigns data bits of the envelopes to the data channels Kl to Xn and emits these data bits to the data connection device AG. The data connection device AG transmits the envelope-structured data in known manner across the subscriber line TL to a transmission unit U and emits the data to a t.d.m. system. Envelopes which arrive from the t.d.m.
system via the subscriber line TL in a corresponding data connection device of the receiving subscriber station are freed of the contxol bits in the data connection d~vice, and the data bits are emitted to a corresponding channel divider by which they are assigned to the individual channels.
As only unstructured data can be transmitted in the data channels Kl to Kn because it is not possible to carry out an additional speed transformation for the formation of the enve-lopes, the data is expediently transmitted in the data network via dedlcated connections. ~lowever, it is also possible to multiply exploit subscriber lines for dialling operation. In this case the criteria for switching can, for example, be transmitted by the insertion of a further synchroniæing bit.
The envelope illustrated in :Line a of figure 3 contains, in known manner, two control bits, namely a synchroniæing bit s and a status bit A, and eight data bits D. In the known data transmission arrangement as iLlustrated in figure 1, the data bits D are assigned to one single data channel between a data terminal device and a data connection device. This data channel may have a transmission speed of Eor example 2~00, ~800, 7200 or 9600 bit/s. The data connection device is designed, for example, for a t-ransmission speed of up to 9600 bit/s. The addition of the control bits S and A results in a : gross transmission speed of 12000 bit/s on that side of the data connection device facing towards the subscriber line with a net transmission speed of 9600 bit/s. The following description will be based upon these transmission speed values.
In the case of the envelope illustrated in line b, in accordance with figure 2, four data channels are .
.~
:
~.. ..
combined hy the channel diYider. Each of the d~ta ci~nnels has a transmission speed of ~400 bit/s so that a net transmission speed of 9600 bit/s is again produced at the output of the data connection device AG. The data bits of the envelopes are consecu-tively assigned to the data channels which are referenced 1 to 4. Thus each envelope serves to transmit data from all four data terminal devices in the data network.
Similarly, in the case of the envelope illustrated in line c, two data channels each having a transmission speed of 4800 bit/s are internested. By way of a further example, line d shows an envelope in which the data bits are assigned to three data channels, the data channel 1 having a transmission speed of 4800 bit/s, and the data channels 2 and 3 having trans~ission speeds of 2400 bit/s. In the case of the envelope illustrated in line e, the data channel 1 has a transmission speed of 7200 bit/s and the data channel 2 has a transmission speed of 2400 bit/s.
The number of data bits which are assigned to a data channel is proportional to its transmission speed.
If n is the number of data bits in an envelope, the number of data bits assigned to the channel is equal to the n-th quotient of the transmission speed of that channel and the net transmission speed of the envelqpe~
If the calculation of the numbex of data bits assigned to a data channel does not result in a whole ~12-~;839Z
n~nber, a plurality o~ envelopes are combined and the data channels are distributed amongst these envelopes.
The two envelopes illustrated in line a of figure 4 each contain two control bits S and A and six data bits D or D'. If these en~elopes are to be used at a net transmission speed of 9600 bit/s to transmit four data channels each of 2400 bit/s, these data channels 1 to 4 are distributed between the two envelopes in accordance with the illustration in line b.
When the data bits are assigned to two data channels each having a transmission speed of 4800 bit/s, it is not essential to combine two envelopes, as shown in line c. Here three bits can be assigned to the first data channel and three bits to the second data channel in ~, .
an envelope, similarly as in figure 3~
Lines d and e, similarly to lines d and e in figure 3, illustrate the distribution of three and two data channels respectively of 4800 and 2400, and 7200 and 2400 bit/s respectively. As in line b, here again two envelopes are required in order to uniformly assign the data channels in accordance with their transmission speeds to the data bits of the envelopes. The alternation 1-0-1 ... of the sync~ronising bits S of the consecutive envelopes are used to form a super fr~n~.
~5 The channel divider KT illustrated in figure, 5 is designed for the connection of two data channels each of 4800 bit/s. A data connection device AG which ~l~6~
has likewise been shown is provided for a net transW
mission speed of 9600 bit/s.
Data emanating from the data terminal device El is fed in the form of signals Sl to a shift register SRl.
A pulse generator TG of the clata connection device produces timing pulses Tl at a frequency corresponding to the transmission speed of 9600 bit/s. Via a switch SWl which, in the case of multi-c:hannel transmission, occupies the solid-line position, the timing pulses Tl are fed to a freuqency divider Fl which emits to the data terminal device El transmission pulses T2 whose repetition frequency is half that of the timing pulses Tl. With the aid of these transmittea clock pulses T2, the data corresponding tc thesignals Sl is also input into the shift register - 15 SRl in serial fashion. At the same time the data terminal device E2 emits data in the ~orm of signals S2 to a shift register SR2. The data terminal device E2 - is likewise supplied with the transmission pulses T2 and the data corresponding to thesignals S2 is input ~0 into the shift register SR2 in serial fashion. The outputs of the shift registers SRl and SR2 are connected to the parallel inputs of a shift register SR3 in the data connection device and the states of the storage cells of the register SR3 change in accordance with the states of the storage cells of the shift registers SRl and SR2 to which they are connected.
The pulse generator TG produces timing pulses T3 with which the contents of the register SR3 are trans-ferred into a shift register SR4. Simultaneously the two control bits S and A are input into the first two positions oP this shift register SR4. The pulse generator TG then supplies the shift register SR4 with timing pulses T4 having a repetition frequency which corresponds to the gross transmission speed of the envelopes. With the aid of these timing pulses the contents of the shift register SR4 is transfe:rred in serial fashion to a transmitter SE which is provided with a scrambler, a coder, and a pulse shaper and which emits transmitted signals via a subscriber line TLS to the data netwoxk.
If the data connection device is also to be used for one-channel transmission, the registPr S3 is also a shift register and the data from the data terminal device is supplied in the form o signals S3 to the serial input of the shift register SR3. The change-over switch SWl assumes the broken-line position and the timing pulses Tl are fed to the data terminal device in the form of a transmitted pulse train with which the data contained in the signals S3 are input in serial fashion into the shift register SR3. Then, as in the case of multi-channel operation, the contents of the shift register SR3 is transferred into the shift register SR4 and transmitted.
Received signals incoming via a subscribPr line TLE
are fed to a recei~er EM of the data connection device.
The receiver EM contains a regulating amplifier, an automatic distortion corrector, a decoder, and a descrambler, and from its output emits signals S4 which each represent a received envelope. The receiver EM is connected to a synchronising device SY which produces timing pulses T5 with the aid of which ~he data contai~ed in the signals S4 can be input into a shift register SR5. When the synchronising bit S is recognised, the synchronising device SY ~nits a timing pulse T6 to a shift register SR6 ~Jhich receives only the data bits of the envelope. Then~ in accordance with the assignment of the data channels to the data bits of the envelope, part of the contents of the shift register SR6 i5 transferred into a shiit register SR7 and part into a shift register SR8.
The synchronising device SY emits timing pulses T7 whose repetition frequency corresponds to the net transmission speed of 9600 bit/s. Via a change-over switch SW2 which occupies the broken-line position, the - timing pulses T7 are fed to a frecuency divider F2 which halves the repetition frequency of the timing pulses T7 and supplies the shift registers SR7 and SR8 with timing pulses T8 whereby their contents are read out in serial fashion. The data emitted at their serial outputs is fed to the data terminal devices El and E2 in the form of s gnals S5 and S6 respectively. The frequ~ncy divider 5~ also emits the timing pul~es T8 as associated received clock pulses to the data terminal devices El and E2.
3~
In the case of one-channel operati~n of the data connection device, the change~over switch SW2 also assumes the broken-line position and~ following transfer from the shift register SR5, the contents of the shift register SR6 is read-out in serial fashion. Signals S7 emitted at its output represe:nt the received data and are forwarded to the correspo:nding data terminal device together with a receiving pulse train T7.
When a plurality of envelopes are used in place of the circuit arrangement i~ustrated in figure 5 for the transmission of envelopes composed of eight data bits and two control bits, the shift registers SR3 to SR6 are designed to accommodate the corresponding nu~ber of envelopes and the transfer into the shift registers SR4 and SR6 is carried out in accordance with the number of combined envelopesO
Claims (10)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A method for operating a data transmission system having data channels for emitting and receiving data in which data bits are synchronously transmitted together with control bits in envelopes, comprising forming each envelope to include data bits of at least two data channels emitting data, and utilizing the control bits as sole synchronizing information for bit and bit group synchronization.
2. A method for operating a data transmission system according to claim 1, characterized by the consecutive process steps:
a) at the transmitting end, unstructured data stemming from a data terminal device is transmitted at a relevant data transmission speed via relevant data channels, b) the data is internested in such a way and combined to form envelopes by adding the control bits, that each envelope contains data bits of a plurality of data channels, and that the number of data bits of each data channel depends on the ratio of the data transmission speed of a subscriber channel connected to the data network to the data transmission speeds in the relevant data channel, c) the envelopes are fed to a subscriber channel in serial fashion, d) at the receiving end the control bits are separated from the envelopes transmitted via the subscriber channel and the data bits are dis-tributed to the appropriate data channels, e) the distribution of the data bits into bit groups and the detection of the individual data bits are synchronized by means of the control bits, f) the data is transferred in serial fashion at the appropriate data transmission speeds via the data channels to the connected data terminal devices.
a) at the transmitting end, unstructured data stemming from a data terminal device is transmitted at a relevant data transmission speed via relevant data channels, b) the data is internested in such a way and combined to form envelopes by adding the control bits, that each envelope contains data bits of a plurality of data channels, and that the number of data bits of each data channel depends on the ratio of the data transmission speed of a subscriber channel connected to the data network to the data transmission speeds in the relevant data channel, c) the envelopes are fed to a subscriber channel in serial fashion, d) at the receiving end the control bits are separated from the envelopes transmitted via the subscriber channel and the data bits are dis-tributed to the appropriate data channels, e) the distribution of the data bits into bit groups and the detection of the individual data bits are synchronized by means of the control bits, f) the data is transferred in serial fashion at the appropriate data transmission speeds via the data channels to the connected data terminal devices.
3. A method according to claim 2, characterized in that at least one data bit in at least one envelope from a series of envelopes is assigned to one data channel.
4. A circuit arrangement for carrying out the method according to claim 2, whereby the data terminal devices are connected to a synchronous data network via assigned data channels and data connection devices, charact-erized in that a channel divider is provided in the connection path between the data terminal devices and a corresponding data connection device at both the transmitting and receiving end, said channel divider internesting the data bits transmitted via the data channels or distributing the data bits of the envelopes to the various data channels, and that the data connection device contains at both the transmitting and receiving end at least one store in which the data bits transmitted via the data channels are input via the channel divider or from which the data bits of the envelopes are read out and emitted via the channel divider to the data channels.
5. A circuit arrangement according to claim 4, characterized in that the channel divider contains, for each data channel, a transmitting-end shift register and a receiving-end shift register in which the data assigned to the data channels is intermediately stored prior to transfer into the data con-nection device and following transfer from the data connection device.
6. A circuit arrangement according to claim 5, characterized in that the length of the shift registers is equal to the number of data bits assigned to the relevant data channel.
7. A circuit arrangement according to claim 5 or 6, characterized in that both at the transmitting end and the receiving end the data connection de-vice contains a plurality of shift registers which accommodate envelopes and which are connected to the shift registers assigned to the data channels.
8. A circuit arrangement according to claim 4, 5 or 6, characterized in that change-over switches are provided via which timing pulses produced in a transmitting-end pulse generator or in a receiving-end synchronizing device are selectively fed either to the shift registers or to frequency divid-ers which are provided in the data connection device and which produce transmitting and receiving-pulse trains assigned to the plurality of data channels.
9. A circuit arrangement according to claim 5 or 6, characterized in that both at the transmitting end and the receiving end the data connection device contains a plurality of shift registers which accommodate envelopes and which are connected to the shift registers assigned to the data channels, and characterized in that change-over switches are provided via which timing pulses produced in a transmitting-end generator or in a receiving-end synch-ronizing device are selectively fed either to the shift registers or to frequency dividers which are provided to the data connection device and which produce transmitting - and receiving-pulse trains assigned to the plurality of data channels.
10. A circuit arrangement according to claim 4, 5 or 6 characterized in that at least one data bit in at least one envelope from a series of envelopes is assigned to one data channel.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2828602A DE2828602C2 (en) | 1978-06-29 | 1978-06-29 | Method for transmitting data in a synchronous data network |
| DEP2828602.4 | 1978-06-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1168392A true CA1168392A (en) | 1984-05-29 |
Family
ID=6043125
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000330703A Expired CA1168392A (en) | 1978-06-29 | 1979-06-27 | Data transmission |
Country Status (7)
| Country | Link |
|---|---|
| EP (1) | EP0006986B1 (en) |
| AT (1) | ATE2166T1 (en) |
| AU (1) | AU4848579A (en) |
| BR (1) | BR7904078A (en) |
| CA (1) | CA1168392A (en) |
| DE (1) | DE2828602C2 (en) |
| NO (1) | NO158400C (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3002929A1 (en) * | 1980-01-28 | 1981-07-30 | Siemens AG, 1000 Berlin und 8000 München | METHOD AND CIRCUIT ARRANGEMENT FOR TRANSMITTING DATA IN A SYNCHRONOUS DATA NETWORK |
| JPS5723356A (en) * | 1980-07-02 | 1982-02-06 | Hitachi Ltd | Sound signal converter |
| DE3103574C2 (en) * | 1981-02-03 | 1983-06-16 | Siemens AG, 1000 Berlin und 8000 München | Circuit arrangement for establishing and maintaining synchronization between envelope clock pulses derived from locally generated bit clock pulses and synchronization bits contained in envelopes of a binary-coded signal |
| EP0164689A3 (en) * | 1984-06-04 | 1988-01-27 | Siemens Aktiengesellschaft | Circuit for receiving and/or transmitting serial binary signals on a plurality of lines in a processing device comprising a microcomputer or a microprocessor |
| EP0164105A3 (en) * | 1984-06-04 | 1988-01-27 | Siemens Aktiengesellschaft | Circuit for receiving and/or transmitting serial binary signals in a processing device comprising a microcomputer or a microprocessor |
| FR2599573B1 (en) * | 1986-05-27 | 1988-08-26 | Montaudoin Patrice | INTERFACE BETWEEN A DATA CIRCUIT TERMINATION EQUIPMENT AND SEVERAL TERMINAL DATA PROCESSING EQUIPMENT. |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1303270A (en) * | 1970-09-02 | 1973-01-17 | ||
| NL7307169A (en) * | 1973-05-23 | 1974-11-26 | ||
| FR2265227A1 (en) * | 1974-03-22 | 1975-10-17 | Constr Telephoniques | Time multiplex exchange for binarily coded signals - which have different transmission speeds and uses topographic tables |
| FR2346915A1 (en) * | 1976-03-31 | 1977-10-28 | Texier Alain | DIGITAL TRANSMISSION SYSTEM ENSURING MULTIPOINT LINKS |
| DE2652038C2 (en) * | 1976-11-15 | 1978-10-26 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | System for the central generation of an envelope interleaved time division multiplex signal |
-
1978
- 1978-06-29 DE DE2828602A patent/DE2828602C2/en not_active Expired
-
1979
- 1979-05-22 EP EP79101571A patent/EP0006986B1/en not_active Expired
- 1979-05-22 AT AT79101571T patent/ATE2166T1/en not_active IP Right Cessation
- 1979-06-27 CA CA000330703A patent/CA1168392A/en not_active Expired
- 1979-06-27 BR BR7904078A patent/BR7904078A/en unknown
- 1979-06-27 NO NO792164A patent/NO158400C/en unknown
- 1979-06-28 AU AU48485/79A patent/AU4848579A/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| AU4848579A (en) | 1980-01-03 |
| EP0006986A1 (en) | 1980-01-23 |
| EP0006986B1 (en) | 1982-12-29 |
| NO158400C (en) | 1988-08-31 |
| DE2828602C2 (en) | 1983-02-24 |
| ATE2166T1 (en) | 1983-01-15 |
| DE2828602B1 (en) | 1979-12-13 |
| NO792164L (en) | 1980-01-03 |
| NO158400B (en) | 1988-05-24 |
| BR7904078A (en) | 1980-04-01 |
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| MKEX | Expiry |