JPS5710998A - Circuit board - Google Patents

Circuit board

Info

Publication number
JPS5710998A
JPS5710998A JP8532380A JP8532380A JPS5710998A JP S5710998 A JPS5710998 A JP S5710998A JP 8532380 A JP8532380 A JP 8532380A JP 8532380 A JP8532380 A JP 8532380A JP S5710998 A JPS5710998 A JP S5710998A
Authority
JP
Japan
Prior art keywords
circuit board
board
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8532380A
Other languages
Japanese (ja)
Other versions
JPS6341238B2 (en
Inventor
Mamoru Yanagisawa
Hidehiko Akasaki
Tomio Oda
Takehisa Tsujimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8532380A priority Critical patent/JPS5710998A/en
Publication of JPS5710998A publication Critical patent/JPS5710998A/en
Publication of JPS6341238B2 publication Critical patent/JPS6341238B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Wire Bonding (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP8532380A 1980-06-24 1980-06-24 Circuit board Granted JPS5710998A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8532380A JPS5710998A (en) 1980-06-24 1980-06-24 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8532380A JPS5710998A (en) 1980-06-24 1980-06-24 Circuit board

Publications (2)

Publication Number Publication Date
JPS5710998A true JPS5710998A (en) 1982-01-20
JPS6341238B2 JPS6341238B2 (en) 1988-08-16

Family

ID=13855407

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8532380A Granted JPS5710998A (en) 1980-06-24 1980-06-24 Circuit board

Country Status (1)

Country Link
JP (1) JPS5710998A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6053093A (en) * 1983-09-02 1985-03-26 株式会社日立製作所 Circuit board
JPH02185053A (en) * 1989-01-12 1990-07-19 Shinko Electric Ind Co Ltd Substrate for flip chip bonding
JPH11251484A (en) * 1998-03-06 1999-09-17 Mitsui High Tec Inc Chip-sized semiconductor device
US6461953B1 (en) 1998-08-10 2002-10-08 Fujitsu Limited Solder bump forming method, electronic component mounting method, and electronic component mounting structure
JP2012513109A (en) * 2008-12-19 2012-06-07 トロワデー、プリュ Wafer scale manufacturing method for surface mount electronic module

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50102265A (en) * 1974-01-09 1975-08-13

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50102265A (en) * 1974-01-09 1975-08-13

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6053093A (en) * 1983-09-02 1985-03-26 株式会社日立製作所 Circuit board
JPH0465536B2 (en) * 1983-09-02 1992-10-20 Hitachi Ltd
JPH02185053A (en) * 1989-01-12 1990-07-19 Shinko Electric Ind Co Ltd Substrate for flip chip bonding
JPH11251484A (en) * 1998-03-06 1999-09-17 Mitsui High Tec Inc Chip-sized semiconductor device
US6461953B1 (en) 1998-08-10 2002-10-08 Fujitsu Limited Solder bump forming method, electronic component mounting method, and electronic component mounting structure
JP2012513109A (en) * 2008-12-19 2012-06-07 トロワデー、プリュ Wafer scale manufacturing method for surface mount electronic module

Also Published As

Publication number Publication date
JPS6341238B2 (en) 1988-08-16

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